发明授权
- 专利标题: Method for making semiconductor device
- 专利标题(中): 制造半导体器件的方法
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申请号: US578036申请日: 1984-02-08
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公开(公告)号: US4536950A公开(公告)日: 1985-08-27
- 发明人: Hideaki Sadamatsu , Michihiro Inoue , Akihiro Kanda , Akira Matsuzawa
- 申请人: Hideaki Sadamatsu , Michihiro Inoue , Akihiro Kanda , Akira Matsuzawa
- 申请人地址: JPX Kadoma
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JPX Kadoma
- 优先权: JPX58-20660 19830210; JPX58-20662 19830210; JPX58-20663 19830210
- 主分类号: H01L21/033
- IPC分类号: H01L21/033 ; H01L21/265 ; H01L21/331 ; H01L21/762 ; H01L21/225
摘要:
In making a vertical bipolar transistors, after forming by diffusion process a region to become inactive base region an oxide film is selectively formed on the region, thereafter an ion implantation is carried out to produce regions which become the active base region and emitter region by using the oxide film; thereby such a configuration is formed so that defect part (108) induced at the time of the ion implantation is confined in the emitter region, thereby minimizing the leakage current at the PN junction, and hence assuring production of high performance and high reliability semiconductor devices; further, a high integration is attained by adopting self-alignment in forming emitter contact.
公开/授权文献
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