发明授权
- 专利标题: Multiplication device using multiple-input adder
- 专利标题(中): 乘法器使用多输入加法器
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申请号: US461257申请日: 1983-01-26
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公开(公告)号: US4543641A公开(公告)日: 1985-09-24
- 发明人: Masaharu Fukuta , Yoshio Oshima , Sako Ishikawa , Toru Ohtsuki
- 申请人: Masaharu Fukuta , Yoshio Oshima , Sako Ishikawa , Toru Ohtsuki
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX57-11626 19820129
- 主分类号: G06F7/53
- IPC分类号: G06F7/53 ; G06F7/491 ; G06F7/496 ; G06F7/508 ; G06F7/52 ; G06F7/527
摘要:
A multiplier device comprising hold means for holding the result of addition, block product means for producing k block products each having 2n bits, where n is an integer equal to or greater than 2, the k block products being formed by multiplying each block by n bits, k blocks being obtained by dividing a multiplicand at intervals of n bits from the least significant bit of the multiplicand, and adder means for adding two groups of block products to the output of the hold means, the two groups of block products consisting of alternate block products out of the k block products from the block product means.