发明授权
- 专利标题: Shift circuit for double word length data
- 专利标题(中): 双字长数据移位电路
-
申请号: US484865申请日: 1983-04-14
-
公开(公告)号: US4631703A公开(公告)日: 1986-12-23
- 发明人: Tsutomu Sakamoto
- 申请人: Tsutomu Sakamoto
- 申请人地址: JPX Kawasaki
- 专利权人: Tokyo Shibaura Denki Kabushiki Kaisha
- 当前专利权人: Tokyo Shibaura Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX57-67932 19820422
- 主分类号: G06F7/00
- IPC分类号: G06F7/00 ; G06F5/01 ; G06F7/76
摘要:
According to a shift circuit of the present invention, two single-word length data shifters of 2.sup.n bits are arranged in parallel. Further, a selective output section is provided to selectively supply the upper 2.sup.n bits or the lower 2.sup.n bits of the double-word length data of 2.sup.n+1 bits, sign of the data and constant to an individual section in accordance with the number of the shift and the type of shift such as the shift direction, arithmetic shift or logical shift. One shifter produces the upper 2.sup.n bits of the shifted data as a result of the shift operation of the double-word length data of 2.sup.n+1 bits, and the other shifter produces the lower 2.sup.n bits thereof while the two shifters operate independently in accordance with the same contents of a shifting number register.
公开/授权文献
信息查询