Invention Grant
- Patent Title: Wrap-around logic for interprocessor communications
- Patent Title (中): 处理器间通讯的包络逻辑
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Application No.: US806123Application Date: 1985-12-06
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Publication No.: US4639860APublication Date: 1987-01-27
- Inventor: Arthur Peters
- Applicant: Arthur Peters
- Applicant Address: MA Waltham
- Assignee: Honeywell Information Systems Inc.
- Current Assignee: Honeywell Information Systems Inc.
- Current Assignee Address: MA Waltham
- Main IPC: G06F11/16
- IPC: G06F11/16 ; G06F11/22 ; G06F12/08 ; G06F15/16
Abstract:
A minicomputer system is disclosed having a bus with a plurality of processors and/or subprocessors, input/output (I/O) units and including logic for enabling an alternate route for issuing instructions from one processor to another. The logic detects information that is not to be transferred to the I/O devices and accordingly reroutes it back to the central processor and/or subprocessors.
Public/Granted literature
- US06026862A Double containment pipe sections Public/Granted day:2000-02-22
Information query
