发明授权
- 专利标题: Semiconductor read only memory device with improved access time
- 专利标题(中): 半导体只读存储器件具有改进的访问时间
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申请号: US654215申请日: 1984-09-25
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公开(公告)号: US4692902A公开(公告)日: 1987-09-08
- 发明人: Sumio Tanaka , Shinji Saito , Shigeru Atsumi
- 申请人: Sumio Tanaka , Shinji Saito , Shigeru Atsumi
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX58-177584 19830926
- 主分类号: G11C17/00
- IPC分类号: G11C17/00 ; G11C7/06 ; G11C7/12 ; G11C7/14 ; G11C8/18 ; G11C16/06 ; H01L27/10 ; G11C7/00
摘要:
A semiconductor memory device in which the differential amplifier circuit compares a potential of a bit line to which memory cells storing information are connected with a reference potential of a dummy line to which a dummy cell is connected, and detects information stored in each of the memory cells. The semiconductor memory device comprises a circuit which discharges both the bit line and the dummy line to a low potential when the chip enable inverted signal is supplied. When the chip enable signal is supplied, therefore, the differential amplifier circuit can detect a difference between the bit line potential and the dummy line potential before the bit line is fully charged up. This makes it possible to produce the chip enable access time and to realize higher speed operations.
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