发明授权
- 专利标题： MOS static memory circuit
- 专利标题（中）： MOS静态存储电路
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申请号： US800270申请日： 1985-11-21
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公开(公告)号： US4760562A公开(公告)日： 1988-07-26
- 发明人: Takayuki Ohtani
- 申请人： Takayuki Ohtani
- 申请人地址： JPX Kawasaki
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX59-256149 19841204; JPX60-240971 19851028
- 主分类号： G11C11/419
- IPC分类号： G11C11/419 ; G11C13/00 ; G11C7/00
摘要：
Voltage converters are arranged in units of columns in a memory device. Each voltage converter is connected to a column decoder. The column decoder receives a column address signal and supplies a column selection signal to the voltage converter. The voltage converters apply a ground level voltage to the source junctions of the drive transistor pairs of the memory cells of the selected columns, and a voltage higher than the ground level voltage to the source junctions of the drive transistor pairs of the memory cells of the nonselected columns so as to decrease power consumption in the nonselected columns as compared with that in the selected columns.
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