A dynamic memory device comprises a dynamic memory circuit, an input buffer circuit for temporarily storing data each time it is received from a source external to the device; an output buffer circuit for temporarily storing data each time it is read out from the dynamic memory circuit and for outputting the stored data in a unit of a predetermined number of words each time a request for reading is made; and a control circuit for controlling the input and output buffer circuits so that reading and writing operations can be performed independently of a refreshing operation.