发明授权
US4816424A Method of producing semiconductor device having multilayer conductive
lines
失效
具有多层导电线的半导体器件的制造方法
- 专利标题： Method of producing semiconductor device having multilayer conductive lines
- 专利标题（中）： 具有多层导电线的半导体器件的制造方法
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申请号： US928330申请日： 1986-11-10
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公开(公告)号： US4816424A公开(公告)日： 1989-03-28
- 发明人: Kiyoshi Watanabe , Tohru Takeuchi , Hideaki Ohtake , Ichiro Fujita
- 申请人： Kiyoshi Watanabe , Tohru Takeuchi , Hideaki Ohtake , Ichiro Fujita
- 申请人地址： JPX Kawasaki
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX58-49792 19830325
- 主分类号： H01L21/28
- IPC分类号： H01L21/28 ; H01L21/3205 ; H01L21/768 ; H01L23/52 ; H01L29/43 ; H01L29/45 ; H01L21/441
摘要：
A triple-layer electrode structure or a multilayer interconnecting structure of a semiconductor device comprising a contact (a lower conductive) layer of aluminum or its alloy which comes into contact with a silicon substrate, a barrier layer of refractory metal nitride (e.g. titanium nitride) and refractory metal (e.g., tungsten), and a (upper) conductive layer of aluminum or its alloy. The TiN-W barrier layer prevents overdissolution of silicon into aluminum in spite of heat-treatment at a relatively elevated temperature. The barrier layer is formed by sintering a mixture of refractory metal nitride powder and refractory metal powder to form a target which is sputter deposited on the contact layer in an atomsphere excluding gaseous nitrogen.
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