A system for communicating between a plurality of nodes in a computer, each node including logic circuitry or transmitting and receiving data at first and second logic levels. The system includes an arbiter coupled to the nodes for detecting a lack of request activity from the nodes. A default generator is connected to the arbiter and responds to a lack of request activity and the absence of a multi-cycle data transfer being performed on the bus and causes the bus to be driven to one of the first and second logic levels.