-
1.发明授权Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfer 失效前瞻性总线仲裁系统，通过总线周期扩展覆盖多周期数据传输的条件访问授权
公开(公告)号：US5111424A
公开(公告)日：1992-05-05
申请号：US483813
申请日：1990-02-23
IPC分类号： G06F13/364
CPC分类号： G06F13/364
摘要： A node for obtaining access to a bus. In this arbitration method, the node receives a conditional grant. The node determines whether access to the bus will actually transfer to it. The node contains distributed logic that examines an extend bus cycle signal to determine whether it can become a transmitter to transfer messages on the bus. When the node becomes a transmitter, it generates an extend bus cycle signal to maintain access to the bus when executing a multi-cycle transfer, even though other nodes, perhaps with higher priorites, require access to the bus.
摘要翻译： 用于获取访问总线的节点。 在该仲裁方法中，节点接收条件授权。 节点确定对总线的访问是否实际传输到它。 节点包含分布式逻辑，检查扩展总线周期信号，以确定它是否可以成为在总线上传输消息的发送器。 当节点成为发射机时，即使执行多周期传输，即使其他节点（也许具有较高的优先级）也需要访问总线，它会生成一个扩展总线周期信号，以保持对总线的访问。
-
2.发明授权Lockhead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers 失效锁定总线仲裁系统，通过多周期数据传输的总线周期扩展覆盖条件访问许可
公开(公告)号：US5034883A
公开(公告)日：1991-07-23
申请号：US483797
申请日：1990-02-23
IPC分类号： G06F13/364
CPC分类号： G06F13/364
摘要： A node for obtaining access to a bus. In this arbitration method, the node receives a conditional grant. The node determines whether access to the bus will actually transfer to it. The node contains distributed logic that examines an extend bus cycle signal to determine whether it can become a transmitter to transfer messages on the bus. When the node becomes a transmitter, it generates an extend bus cycle signal to maintain access to the bus when executing a multi-cycle transfer, even though other nodes, perhaps with higher priorities, require access to the bus.
摘要翻译： 用于获取访问总线的节点。 在该仲裁方法中，节点接收条件授权。 节点确定对总线的访问是否实际传输到它。 节点包含分布式逻辑，检查扩展总线周期信号，以确定它是否可以成为在总线上传输消息的发送器。 当节点成为发射机时，即使执行多周期传输，即使其他节点（可能具有较高优先级）也需要访问总线，它会生成扩展总线周期信号，以维持对总线的访问。
-
3.发明授权Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers 失效前瞻性总线仲裁系统，通过多周期数据传输的总线周期扩展覆盖条件访问授权
公开(公告)号：US4980854A
公开(公告)日：1990-12-25
申请号：US44470
申请日：1987-05-01
IPC分类号： G06F15/16 , G06F13/26 , G06F13/36 , G06F13/362 , G06F13/364 , G06F13/372 , G06F15/177
CPC分类号： G06F13/364
摘要： A system and method for nodes to obtain access to a bus. In this arbitration method, a central arbiter selects a particular node and issues a conditional grant. The conditional grant is transmitted before it is determined whether access to the bus will actually transfer to another node. Each node contains distributed logic that examines an extend bus cycle signal to determine whether it can become a transmitter to transfer messages on the bus. When a node becomes a transmitter, it generates an extend bus cycle signal to maintain access to the bus when executing a multi-cycle transfer, even though other nodes, perhaps with higher priorities, require access to the bus.
摘要翻译： 节点访问总线的系统和方法。 在这种仲裁方法中，中央仲裁者选择一个特定的节点并发出条件授权。 在确定对总线的访问是否将实际转移到另一个节点之前，传送条件许可。 每个节点包含分布式逻辑，用于检查扩展总线周期信号，以确定它是否可以成为在总线上传输消息的发送器。 当节点成为发射机时，即使执行多周期传输，即使其他节点（可能具有较高优先级）也需要访问总线，它会生成一个扩展总线周期信号，以保持对总线的访问。
-
4.发明授权Node with coupling resistor for limiting current flow through driver during overlap condition 失效具有耦合电阻的节点，用于在重叠条件期间限制通过驱动器的电流
公开(公告)号：US5146563A
公开(公告)日：1992-09-08
申请号：US327425
申请日：1989-03-23
IPC分类号： G06F13/40
CPC分类号： G06F13/4072 , G06F13/4077 , Y02B60/1228 , Y02B60/1235
摘要： A node includes logic circitry for transmitting and receiving data on a backplane bus. The driver in the transmitting logic in the node acts with the current source provided by the bus to decrease the transition time of the data transmitted onto the bus. A coupling resistor is included in the node for individually coupling the driver in the node to the bus for limiting voltage excursions on the bus and providing impedance matching between the node and bus and permitting driver overlap at the bus so that higher speed and lower power dissipation occurs. In the preferred embodiment, CMOS logic circuitry is utilized.
摘要翻译： 节点包括用于在背板总线上发送和接收数据的逻辑循环。 节点中的发送逻辑中的驱动器与由总线提供的当前源起作用，以减少发送到总线上的数据的转换时间。 节点中包括耦合电阻，用于将节点中的驱动器单独耦合到总线，以限制总线上的电压偏移，并提供节点和总线之间的阻抗匹配，并允许驱动器在总线上重叠，从而实现更高的速度和更低的功耗 发生。 在优选实施例中，利用CMOS逻辑电路。
-
公开(公告)号：US4837736A
公开(公告)日：1989-06-06
申请号：US44953
申请日：1987-05-01
CPC分类号： G06F13/4072 , G06F13/36
摘要： A system for communicating between a plurality of nodes in a computer, each node including logic circuitry or transmitting and receiving data at first and second logic levels. The system includes an arbiter coupled to the nodes for detecting a lack of request activity from the nodes. A default generator is connected to the arbiter and responds to a lack of request activity and the absence of a multi-cycle data transfer being performed on the bus and causes the bus to be driven to one of the first and second logic levels.
摘要翻译： 一种用于在计算机中的多个节点之间通信的系统，每个节点包括逻辑电路或者在第一和第二逻辑电平处发送和接收数据。 该系统包括耦合到节点的仲裁器，用于检测节点中缺少请求活动。 默认生成器连接到仲裁器，并响应于缺少请求活动，并且在总线上不执行多周期数据传输，并使总线被驱动到第一和第二逻辑电平之一。
-
公开(公告)号：US4774422A
公开(公告)日：1988-09-27
申请号：US44780
申请日：1987-05-01
IPC分类号： G06F3/00 , G06F13/40 , H03K17/16 , H03K19/017 , H03K19/092
CPC分类号： G06F13/4072
摘要： Bus interface apparatus is provided to drive a high speed bus with two nonoverlapping clock signals. The apparatus takes advantage of the inherent bus capacitance which will temporarily hold data signals placed on the bus by using bus interface circuitry having high input and output impedances. That circuitry can thus be activated by coincident signals.
摘要翻译： 提供总线接口装置以驱动具有两个不重叠时钟信号的高速总线。 该装置利用通过使用具有高输入和输出阻抗的总线接口电路临时保持放置在总线上的数据信号的固有总线电容。 因此，可以通过重合的信号激活该电路。
-
公开(公告)号：US5003467A
公开(公告)日：1991-03-26
申请号：US44468
申请日：1987-05-01
IPC分类号： G06F13/40
CPC分类号： G06F13/4063
摘要： A node for communicating with a plurality of other nodes in a computer, the node including logic circuitry for transmitting and receiving data at first and second logic levels. A default generator is connected to an arbiter and responds to a lack of request activity and the absence of a multi-cycle data transfer being performed on the bus and causes the bus to be driven to one of the first and second logic levels.
摘要翻译： 一种用于与计算机中的多个其他节点通信的节点，所述节点包括用于在第一和第二逻辑电平处发送和接收数据的逻辑电路。 默认发生器连接到仲裁器，并响应于缺少请求活动，并且在总线上不执行多周期数据传输，并使总线被驱动到第一和第二逻辑电平之一。
-
8.发明授权Lookahead bus arbitration system with override of conditional access grants by bus cycle extensions for multicycle data transfers 失效前瞻性总线仲裁系统，通过多周期数据传输的总线周期扩展覆盖条件访问授权
公开(公告)号：US4947368A
公开(公告)日：1990-08-07
申请号：US44490
申请日：1987-05-01
IPC分类号： G06F15/16 , G06F9/52 , G06F13/26 , G06F13/362 , G06F13/364 , G06F13/366 , G06F15/177
CPC分类号： G06F13/364
摘要： A node for obtaining access to a bus. In this arbitration method, the node receives a conditional grant. The node determines whether access to the bus will actually transfer to it. The node contains distributed logic that examines an extend bus cycle signal to determine whether it can become a transmitter to transfer messages on the bus. When the node becomes a transmitter, it generates an extend bus cycle signal to maintain access to the bus when executing a multi-cycle transfer, even though other nodes, perhaps with higher priorities, require access to the bus.
摘要翻译： 用于获取访问总线的节点。 在该仲裁方法中，节点接收条件授权。 节点确定对总线的访问是否实际传输到它。 节点包含分布式逻辑，检查扩展总线周期信号，以确定它是否可以成为在总线上传输消息的发送器。 当节点成为发射机时，即使执行多周期传输，即使其他可能具有较高优先级的节点需要访问总线，它也会生成一个扩展总线周期信号，以保持对总线的访问。
-
公开(公告)号：US4829515A
公开(公告)日：1989-05-09
申请号：US44467
申请日：1987-05-01
CPC分类号： G06F13/4027
摘要： An interface system between a high speed user bus and a system bus is provided to present to the user bus a picture of the data transferred on the system bus every clock cycle of that system bus. The interface system also allows the user bus to transfer data back to the system bus during selected bus cycles. By using a single pin connection to the system bus, the user bus can send communications back to itself by way of the system bus.
摘要翻译： 提供高速用户总线和系统总线之间的接口系统，以便在系统总线的每个时钟周期向用户总线呈现在系统总线上传送的数据的图像。 接口系统还允许用户总线在选择的总线周期期间将数据传送回系统总线。 通过使用与系统总线的单引脚连接，用户总线可以通过系统总线将通信发送回自身。
-
公开(公告)号：US08417746B1
公开(公告)日：2013-04-09
申请号：US11732492
申请日：2007-04-02
IPC分类号： G06F17/30
CPC分类号： G06F17/301
摘要： A primary (e.g., master) file system stores multiple files and corresponding metadata. A view generator function receives template information (e.g., view configuration information) specifying types of metadata information associated with the multiple files stored in the primary file system. Based on processing of the metadata information in the primary file system as specified by the template information, the generator function produces metadata for inclusion in a secondary file system, which is used to satisfy search inquiries associated with the multiple files stored in the primary file system. According to one arrangement, the generator function replicates metadata information in the primary file system as specified by the template information for inclusion in the secondary file system. The secondary file system can include metadata from other sources as well that produced by the generator function. The secondary file system enables more efficient handling of search inquiries than applying search inquiries to the master file system.
摘要翻译： 主（例如，主）文件系统存储多个文件和对应的元数据。 视图生成器功能接收指定与存储在主文件系统中的多个文件相关联的元数据信息的类型的模板信息（例如，查看配置信息）。 基于由模板信息指定的主文件系统中的元数据信息的处理，生成函数产生用于包含在辅助文件系统中的元数据，用于满足与存储在主文件系统中的多个文件相关联的搜索查询 。 根据一个布置，生成器功能按照由模板信息指定的主文件系统中的元数据信息进行复制，以包括在辅助文件系统中。 辅助文件系统可以包括来自其他源的元数据以及由生成函数产生的元数据。 辅助文件系统可以更有效地处理搜索查询，而不是将搜索查询应用于主文件系统。
-
-
-
-
-
-
-
-
-
搜索结果
21 条记录 (耗时 0.019 秒)
