发明授权
US4958092A Integrated circuit device having row structure with clock driver at end
of each row
失效
具有行结构的集成电路器件，每行末端具有时钟驱动器
- 专利标题： Integrated circuit device having row structure with clock driver at end of each row
- 专利标题（中）： 具有行结构的集成电路器件，每行末端具有时钟驱动器
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申请号： US329908申请日： 1989-03-28
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公开(公告)号： US4958092A公开(公告)日： 1990-09-18
- 发明人: Shigeru Tanaka
- 申请人： Shigeru Tanaka
- 申请人地址： JPX Kawasaki
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX63-73285 19880329
- 主分类号： H01L21/822
- IPC分类号： H01L21/822 ; G06F1/04 ; G06F1/10 ; H01L21/82 ; H01L23/52 ; H01L23/528 ; H01L27/02 ; H01L27/04 ; H03K5/00
摘要：
In an integrated circuit device such as a logic LSI having a row structure, each row includes a group of logic elements and a clock driver. The clock driver in each row is arranged at one end of the row so as to shorten the distances from the clock driver to a primary power supply wiring and a primary ground wiring.
公开/授权文献
- US5468685A Method for producing a semiconductor integrated circuit 公开/授权日：1995-11-21
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