A plurality of slide access memories (SM.sub.00, SM.sub.01, . . . , SM.sub.n-1, m-1), in which a voluntary rectangular group of bits can be accessed, are arranged in an n-rows and m-columns matrix and connected to common data lines (D.sub.0, D.sub.1, . . . , D.sub.15). A first access means accesses the same rectangular group of bits in each of the slide access memories and interconnects these groups to input/output portions incorporated into each of the slide access memories. A second access means selects the input/output portions of each of the slide access memories to enable or disable the operation thereof in accordance with a special bit position, or a pointing bit (PB) position, to thereby connect only a desired group of bits to common data lines, and thus enlarge the scope of slide access memories.