发明授权
US4965220A Method of manufacturing a semiconductor integrated circuit device
comprising an MOS transistor and a bipolar transistor
失效
制造包括MOS晶体管和双极晶体管的半导体集成电路器件的方法
- 专利标题： Method of manufacturing a semiconductor integrated circuit device comprising an MOS transistor and a bipolar transistor
- 专利标题（中）： 制造包括MOS晶体管和双极晶体管的半导体集成电路器件的方法
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申请号： US306393申请日： 1989-02-06
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公开(公告)号： US4965220A公开(公告)日： 1990-10-23
- 发明人: Hiroshi Iwasaki
- 申请人： Hiroshi Iwasaki
- 申请人地址： JPX Kawasaki
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX58-187930 19831007
- 主分类号： H01L21/76
- IPC分类号： H01L21/76 ; H01L21/225 ; H01L21/331 ; H01L21/8249 ; H01L27/06 ; H01L29/73 ; H01L29/732
摘要：
A semiconductor integrated circuit device is disclosed which comprises a bipolar transistor and a field effect transistor, in which a gate electrode of the field effect transistor and a collector electrode of the bipolar transistor are formed from a common electrode layer of a high impurity concentration, and in which the collector region of the bipolar transistor comprises a region of a high impurity concentration having a conductivity type the same as that of the collector region of the bipolar transistor.
公开/授权文献
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