发明授权
US4969086A System for reducing main memory access time by bypassing address
expansion device when high-order address portions are unaltered
失效
用于通过在高位地址部分不变时绕过地址扩展设备来减少主存储器访问时间的系统
- 专利标题： System for reducing main memory access time by bypassing address expansion device when high-order address portions are unaltered
- 专利标题（中）： 用于通过在高位地址部分不变时绕过地址扩展设备来减少主存储器访问时间的系统
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申请号： US376148申请日： 1989-07-05
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公开(公告)号： US4969086A公开(公告)日： 1990-11-06
- 发明人: Klaus Pfeiffer , Wolfgang Kosler , Gerd Trimpop , Erich Paulmichl
- 申请人： Klaus Pfeiffer , Wolfgang Kosler , Gerd Trimpop , Erich Paulmichl
- 申请人地址： DEX Berlin and Munich
- 专利权人： Siemens Aktiengesellschaft
- 当前专利权人： Siemens Aktiengesellschaft
- 当前专利权人地址： DEX Berlin and Munich
- 优先权： DEX3600744 19860113
- 主分类号： G06F12/02
- IPC分类号： G06F12/02 ; G06F12/06
摘要：
Proceeding from a known method and apparatus for expanding the address for accessing a main memory by a central controller of a switching system, a determination is made in a comparator as to whether the address information of the high-order address lines or address registers of the expansion device with respect to a preceding main memory access changes in comparison to the current main memory access. When coincidence is present, the high-order portion of the main memory address in the preceding main memory access stored in an address register is immediately used for the formation of the overall main memory address.