发明授权
- 专利标题: Method of fabricating semiconductor devices having deep and shallow isolation structures
- 专利标题(中): 制造具有深浅的隔离结构的半导体器件的方法
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申请号: US431420申请日: 1989-11-03
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公开(公告)号: US4994406A公开(公告)日: 1991-02-19
- 发明人: Barbara Vasquez , Peter J. Zoebel
- 申请人: Barbara Vasquez , Peter J. Zoebel
- 申请人地址: IL Schaumburg
- 专利权人: Motorola Inc.
- 当前专利权人: Motorola Inc.
- 当前专利权人地址: IL Schaumburg
- 主分类号: H01L21/76
- IPC分类号: H01L21/76 ; H01L21/762 ; H01L21/763 ; H01L21/8249 ; H01L27/06
摘要:
A method of fabricating a semiconductor structure includes forming a thermal oxide layer, a polysilicon layer and a first dielectric layer on a substrate and using a mask to form at least one opening therein. Dielectric spacers are then formed in the opening and a trench having a self-aligned reduction in width due to the dielectric spacers is etched into the substrate beneath the opening. A dielectric trench liner is then formed prior to filling the trench with polysilicon. A second mask is then used to form isolation element openings in the first dielectric layer in which shallow isolation elements are formed.
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