公开(公告)号：US11942539B2

公开(公告)日：2024-03-26

申请号：US17471739

申请日：2021-09-10

申请人： KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

发明人： Shotaro Baba ,  Hiroaki Katou ,  Yuhki Fujino ,  Kouta Tomita

IPC分类号： H01L29/78 ,  H01L21/763 ,  H01L29/06 ,  H01L29/40 ,  H01L29/861

CPC分类号： H01L29/7813 ,  H01L21/763 ,  H01L29/0638 ,  H01L29/407 ,  H01L29/7838 ,  H01L29/861

摘要： A semiconductor device includes a polycrystalline silicon part buried in a termination region of a silicon layer. The polycrystalline silicon part contacts the silicon layer, has a higher crystal grain density than the silicon layer, and includes a heavy metal. The silicon layer includes a drift layer located in a cell region and the termination region. The drift layer has a lower first-conductivity-type impurity concentration than a silicon substrate. The drift layer includes a same element of heavy metal as the heavy metal included in the polycrystalline silicon part.

公开(公告)号：US11791198B2

公开(公告)日：2023-10-17

申请号：US17695119

申请日：2022-03-15

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Hong Yang ,  Seetharaman Sridhar ,  Ya ping Chen ,  Fei Ma ,  Yunlong Liu ,  Sunglyong Kim

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L29/66 ,  H01L21/308 ,  H01L21/02 ,  H01L21/324

CPC分类号： H01L21/76235 ,  H01L21/02164 ,  H01L21/308 ,  H01L21/324 ,  H01L21/763 ,  H01L21/76283 ,  H01L21/76286 ,  H01L29/66666

摘要： A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

公开(公告)号：US20230096544A1

公开(公告)日：2023-03-30

申请号：US17449336

申请日：2021-09-29

申请人： GlobalFoundries U.S. Inc.

发明人： Uzma B. Rana ,  Steven M. Shank ,  Anthony K. Stamper

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L21/762 ,  H01L21/763

摘要： A transistor includes a bulk semiconductor substrate, and first and second raised source/drain regions above the bulk semiconductor substrate. A gate is between the first and second raised source/drain regions. A first dielectric section is beneath the first raised source/drain region in the bulk semiconductor substrate, and a second dielectric section is beneath the second raised source/drain region in the bulk semiconductor substrate. A first air gap is defined in at least the first dielectric section under the first raised source/drain region, and a second air gap is defined in at least the second dielectric section under the second raised source/drain region. The air gaps reduce off capacitance of the bulk semiconductor structure to near semiconductor-on-insulator levels without the disadvantages of an air gap under the channel region.

公开(公告)号：US11527633B2

公开(公告)日：2022-12-13

申请号：US17217173

申请日：2021-03-30

申请人： SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING CORPORATION

发明人： Longjie Zhao

IPC分类号： H01L29/423 ,  H01L21/763 ,  H01L29/06 ,  H01L29/49

摘要： A method for manufacturing a trench gate device includes: forming a trench in a substrate with a super junction structure; forming a gate dielectric layer in the trench; forming a polysilicon gate by filling a portion of the trench with polysilicon; forming an intermediate dielectric layer in the trench; forming an auxiliary polysilicon layer by filling a gap in the trench with polysilicon; forming a source region of the trench gate device in the substrate; depositing an interlayer dielectric layer, and forming contacts in the interlayer dielectric layer, wherein the polysilicon gate, the auxiliary polysilicon layer, and the source region are led out from the contacts; and connecting the led-out auxiliary polysilicon layer to the led-out source region.

公开(公告)号：US11527432B2

公开(公告)日：2022-12-13

申请号：US17086925

申请日：2020-11-02

申请人： GLOBALFOUNDRIES Inc.

发明人： Steven M. Shank ,  Anthony K. Stamper ,  Ian McCallum-Cook ,  Siva P. Adusumilli

IPC分类号： H01L21/763 ,  H01L29/06 ,  H01L27/12 ,  H01L21/762 ,  H01L21/324 ,  H01L21/84 ,  H01L21/265 ,  H01L21/74 ,  H01L29/32 ,  H01L21/02 ,  H01L27/06 ,  H01L29/10

摘要： Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.

公开(公告)号：US20220262900A1

公开(公告)日：2022-08-18

申请号：US17738179

申请日：2022-05-06

申请人： GLOBALFOUNDRIES U.S. INC.

发明人： Uzma RANA ,  Anthony K. STAMPER ,  Johnatan A. KANTAROVSKY ,  Steven M. SHANK ,  Siva P. ADUSUMILLI

IPC分类号： H01L29/06 ,  H01L21/762 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/763 ,  H01L29/10

摘要： The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.

公开(公告)号：US11380759B2

公开(公告)日：2022-07-05

申请号：US16939213

申请日：2020-07-27

申请人： GLOBALFOUNDRIES U.S. INC.

发明人： Uzma Rana ,  Anthony K. Stamper ,  Johnatan A. Kantarovsky ,  Steven M. Shank ,  Siva P. Adusumilli

IPC分类号： H01L29/06 ,  H01L21/762 ,  H01L29/78 ,  H01L29/66 ,  H01L21/763 ,  H01L21/8234 ,  H01L29/10

摘要： The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.

公开(公告)号：US20220189821A1

公开(公告)日：2022-06-16

申请号：US17123184

申请日：2020-12-16

申请人： GLOBALFOUNDRIES U.S. Inc.

发明人： Mark D. Levy ,  Siva P. Adusumilli ,  Alvin J. Joseph

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L23/367 ,  H01L27/12

摘要： A structure includes an active device over an area of a substrate, and a heat spreading isolation structure adjacent the active device. The isolation structure includes a dielectric layer above a heat-conducting layer. The heat-conducting layer may include polycrystalline graphite. The heat-conducting layer provides a heat sink, which provides a high thermal conductivity path for heat with low electrical conductivity. The heat-conducting layer may extend into the substrate. The substrate may include an SOI substrate in which case the heat-conducting layer may extend through the buried insulator thereof.

公开(公告)号：US11302568B2

公开(公告)日：2022-04-12

申请号：US16546499

申请日：2019-08-21

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Hong Yang ,  Seetharaman Sridhar ,  Ya ping Chen ,  Fei Ma ,  Yunlong Liu ,  Sunglyong Kim

IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L21/308 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324

摘要： A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

公开(公告)号：US11282740B2

公开(公告)日：2022-03-22

申请号：US16992165

申请日：2020-08-13

申请人： GLOBALFOUNDRIES U.S. Inc.

发明人： Siva P. Adusumilli ,  Mark D. Levy

IPC分类号： H01L21/00 ,  H01L21/763 ,  H01L29/06 ,  H01L29/04

摘要： Disclosed is a bulk semiconductor structure that includes a semiconductor substrate with a multi-level polycrystalline semiconductor region that includes one or more first-level portions (i.e., buried portions) and one or more second-level portions (i.e., non-buried portions). Each first-level portion can be within the semiconductor substrate some distance below the top surface (i.e., buried), can be aligned below a monocrystalline semiconductor region and/or a trench isolation region, and can have a first maximum depth. Each second-level portion can be within the semiconductor substrate at the top surface, can be positioned laterally adjacent to a trench isolation region, and can have a second maximum depth that is less than the first maximum depth. Also disclosed herein are method embodiments for forming the bulk semiconductor structure wherein the first-level and second-level portions of the multi-level polycrystalline semiconductor region are concurrently formed (e.g., using a single module).