发明授权
- 专利标题: Field effect transistor with lightly doped drain structure and method for manufacturing the same
- 专利标题(中): 具有轻掺杂漏极结构的场效应晶体管及其制造方法
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申请号: US29954申请日: 1987-03-25
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公开(公告)号: US5061649A公开(公告)日: 1991-10-29
- 发明人: Naoko Takenouchi , Katsuhiko Hieda
- 申请人: Naoko Takenouchi , Katsuhiko Hieda
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX61-71158 19860331
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234 ; H01L21/336 ; H01L27/088 ; H01L29/78
摘要:
A semiconductor integrated circuit device is disclosed which has an MOSFET with a lightly doped drain or LLD structure. A gate electrode layer is insulatively provided above a semiconductor substrate of p conductivity type. Source and drain layers of n conductivity type are formed in the substrate in such a manner as to be substantially self-aligned with the gate electrode. Each of these source and drain layers is comprised of a heavily doped diffusion layer and a lightly doped diffusion layer. The n- diffusion layer is deep enough to fully surround the heavily doped layer in the substrate. The n- diffusion layer has a step-like cross-section, whereby the effective channel length of MOSFET is increased inside the substrate to increase the punch-through voltage level.
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