发明授权
US5081517A Mixed technology integrated circuit comprising CMOS structures and
efficient lateral bipolar transistors with a high early voltage and
fabrication thereof
失效
包括CMOS结构的混合技术集成电路和具有高的早期电压和其制造的高效侧向双极晶体管
- 专利标题： Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof
- 专利标题（中）： 包括CMOS结构的混合技术集成电路和具有高的早期电压和其制造的高效侧向双极晶体管
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申请号： US548711申请日： 1990-07-06
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公开(公告)号： US5081517A公开(公告)日： 1992-01-14
- 发明人: Claudio Contiero , Paola Galbiati , Lucia Zullino
- 申请人： Claudio Contiero , Paola Galbiati , Lucia Zullino
- 申请人地址： ITX
- 专利权人： SGS-Thomson Microelectronics S.R.L.
- 当前专利权人： SGS-Thomson Microelectronics S.R.L.
- 当前专利权人地址： ITX
- 主分类号： H01L29/73
- IPC分类号： H01L29/73 ; H01L21/331 ; H01L21/8249 ; H01L27/06 ; H01L29/732
摘要：
A high density, mixed technology integrated circuit comprises CMOS structures and bipolar lateral transistors, the electrical efficiency and Early voltage of which are maintained high by forming "well" regions through the collector area. The operation determines the formation of a "collector extension region" extending relatively deep within the epitaxial layer so as to intercept the emitter current and gather it to the collector, subtracting it from dispersion toward the substrate through the adjacent isolation junctions surrounding the region of the lateral bipolar transistor. Under comparable conditions, the ratio between IcIsubstrate is incremented from about 8 to about 300 and the Early voltage from about 20V to about 100V. The V.sub.CEO, BV.sub.CBO and BV.sub.CDES voltages are also advantageously increased by the presence of said "well" region formed in the collector zone.
公开/授权文献
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