发明授权
- 专利标题： Phase-difference detecting circuit and method of reducing power consumption in a PLL system
- 专利标题（中）： 相位差检测电路和降低PLL系统功耗的方法
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申请号： US534618申请日： 1990-06-06
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公开(公告)号： US5103192A公开(公告)日： 1992-04-07
- 发明人: Shinichi Sekine , Fumitaka Asami , Yukinori Kamizono
- 申请人： Shinichi Sekine , Fumitaka Asami , Yukinori Kamizono
- 申请人地址： JPX Kanagawa JPX Kagoshima
- 专利权人： Fujitsu Limited,Kyushu Fujitsu Electronics Limited
- 当前专利权人： Fujitsu Limited,Kyushu Fujitsu Electronics Limited
- 当前专利权人地址： JPX Kanagawa JPX Kagoshima
- 优先权： JPX1-152901 19890614
- 主分类号： H03L7/187
- IPC分类号： H03L7/187 ; H03D13/00 ; H03L7/08 ; H03L7/089 ; H03L7/183
摘要：
A phase comparison circuit includes phase comparison device for generating an output signal corresponding to the difference in phase between a first input signal and a second input signal. The phase comparison device has an active mode, and a standby mode in which power consumption is reduced. A phase-difference detecting device is connected to the phase comparison device for outputting a control signal when the phase difference between the first and second input signals is smaller than a predetermined value. The phase comparison device is switched from the standby mode to the active mode in response to the control signal.
公开/授权文献
- US4560390A Method of beneficiating coal 公开/授权日：1985-12-24