发明授权
- 专利标题: Method for producing reverse staggered type silicon thin film transistor
- 专利标题(中): 反向交错型硅薄膜晶体管的制造方法
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申请号: US358039申请日: 1989-05-26
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公开(公告)号: US5114869A公开(公告)日: 1992-05-19
- 发明人: Sakae Tanaka , Yoshiaki Watanabe , Katsuo Shirai , Yoshihisa Ogiwara
- 申请人: Sakae Tanaka , Yoshiaki Watanabe , Katsuo Shirai , Yoshihisa Ogiwara
- 申请人地址: JPX Tokyo JPX Tokyo
- 专利权人: Seikosha Co., Ltd.,Nippon Precision Circuits Ltd.
- 当前专利权人: Seikosha Co., Ltd.,Nippon Precision Circuits Ltd.
- 当前专利权人地址: JPX Tokyo JPX Tokyo
- 优先权: JPX63-132090 19880530
- 主分类号: H01L27/12
- IPC分类号: H01L27/12 ; G02F1/136 ; G02F1/1368 ; H01L21/336 ; H01L29/78 ; H01L29/786
摘要:
A method for producing a reverse staggered type silicon thin film transistor includes the steps of forming a gate insulating layer on a substrate having a gate electrode, the gate insulating layer having a transistor-forming portion; forming an intrinsic silicon film on the transistor-forming portion of the gate insulating layer; forming an n-type silicon layer on the intrinsic silicon layer; forming a source electrode on the n-type silicon layer; forming a drain electrode on the n-type silicon layer; forming a resist layer on the source electrode and drain electrode and having the same shape thereof; subsequently removing a portion of the n-type silicon layer by using the resist layer as a mask, such that there remains a predetermined thickness of the n-type silicon layer; and doping the predetermined thickness of the n-type silicon layer with p-type impurities by using the resist layer as a mask.
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