A circuit configuration for improving the resolution of successive pulsed signals over time includes first and second counters each having one clock input, the clock input of the first counter being supplied with a first clock signal, and the clock input of the second counter being supplied with a second clock signal having a n-multiple frequency of the first clock signal. The first counter has a control input and a counter output, the control input of the first counter being supplied with successive pulsed signals. The second counter has a counter input, an overflow output and a write input, the write input of the second counter being connected to the overflow output of the second counter. A register has a data input, a data output, and a write input, the data input of the register being connected to the counter output of the first counter, the write input of the register being connected to the control input of the first counter, and the data output of the register being connected to the counter input of the second counter. The counter state of the first counter is written into the register through the counter output of the first counter and the first counter is subsequently reset, upon one of the successive pulsed signals being supplied to the control input of the first counter. The second counter assumes the value of the register when an overflow signal is tripped.