发明授权
US5153685A Semiconductor integrated circuit device having switching MISFET and
capacitor element and method of producing the same, including wiring
therefor and method of producing such wiring
失效
具有开关MISFET和电容器元件的半导体集成电路器件及其制造方法,包括其布线及其制造方法
- 专利标题: Semiconductor integrated circuit device having switching MISFET and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring
- 专利标题(中): 具有开关MISFET和电容器元件的半导体集成电路器件及其制造方法,包括其布线及其制造方法
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申请号: US246514申请日: 1988-09-19
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公开(公告)号: US5153685A公开(公告)日: 1992-10-06
- 发明人: Jun Murata , Yoshitaka Tadaki , Isamu Asano , Mitsuaki Horiuchi , Jun Sugiura , Hiroko Kaneko , Shinji Shimizu , Atsushi Hiraiwa , Hidetsugu Ogishi , Masakazu Sagawa , Masami Ozawa , Toshihiro Sekiguchi
- 申请人: Jun Murata , Yoshitaka Tadaki , Isamu Asano , Mitsuaki Horiuchi , Jun Sugiura , Hiroko Kaneko , Shinji Shimizu , Atsushi Hiraiwa , Hidetsugu Ogishi , Masakazu Sagawa , Masami Ozawa , Toshihiro Sekiguchi
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX62-235906 19870919; JPX62-235909 19870919; JPX62-235910 19870919; JPX62-235911 19870919; JPX62-235912 19870919; JPX62-235913 19870919; JPX62-235914 19870919
- 主分类号: H01L27/10
- IPC分类号: H01L27/10 ; H01L21/8242 ; H01L27/105 ; H01L27/108
摘要:
A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. In a fifth aspect, the capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure. In sixth and seventh aspects, wiring is provided. In the sixth aspect, an aluminum wiring layer and a protective (and/or barrier) layer are formed by sputtering in the same vacuum sputtering chamber without breaking the vacuum between forming the layers; in the seventh aspect, a refractory metal, or a refractory metal silicide QSI.sub.x, where Q is a refractory metal and 0
公开/授权文献
- US5500987A Pin clip 公开/授权日:1996-03-26