发明授权
US5167022A Multiprocessor bus locking system with a winning processor broadcasting
an ownership signal causing all processors to halt their requests
失效
具有获胜处理器的多处理器总线锁定系统广播所有权信号，导致所有处理器停止其请求
- 专利标题： Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests
- 专利标题（中）： 具有获胜处理器的多处理器总线锁定系统广播所有权信号，导致所有处理器停止其请求
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申请号： US552341申请日： 1990-07-16
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公开(公告)号： US5167022A公开(公告)日： 1992-11-24
- 发明人: Richard G. Bahr , Andrew Milia , Barry J. Flahive
- 申请人： Richard G. Bahr , Andrew Milia , Barry J. Flahive
- 申请人地址： CA Palo Alto
- 专利权人： Hewlett-Packard Company
- 当前专利权人： Hewlett-Packard Company
- 当前专利权人地址： CA Palo Alto
- 主分类号： G06F13/374
- IPC分类号： G06F13/374 ; G06F15/17
摘要：
A method and apparatus for granting, to a select processor in a multiprocessor computing system, exclusive access to a bus for issuance of address, data and command signals thereover, wherein each processor includes bus lock request and bus lock assert elements which provide corresponding bus request and bus hold signals which are recognized by corresponding elements included in other processors connected to the bus. The bus lock according to the present invention assures the processor having lock status of privacy on the bus necessary to complete a specified operation without interruption from the other processors.
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