A programmable controller which combines microaddress control logic, memory, a microinstruction decoder, and I/O into a unitary, integrated device. The microaddress control logic is responsive to sequencing signals developed by the microinstruction decoder, and includes an address generator which develops the program address. The memory, which can be either PROM or RAM, is addressed by the address and outputs a microinstruction word to a pipeline register. The microinstruction word has an internal field which is coupled to inputs of the microaddress control logic and the microinstruction decoder, and a control field which is coupled to an output buffer. The output buffer includes multiplexers which permit either the program count or the control field to be multiplexed to the output pins of the device. When the program address is multiplexed to the output pins, the programmable controller can address external memory devices.