发明授权
US5200351A Method of fabricating field effect transistors having lightly doped
drain regions
失效
制造具有轻掺杂漏极区域的场效应晶体管的方法
- 专利标题: Method of fabricating field effect transistors having lightly doped drain regions
- 专利标题(中): 制造具有轻掺杂漏极区域的场效应晶体管的方法
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申请号: US837536申请日: 1992-02-14
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公开(公告)号: US5200351A公开(公告)日: 1993-04-06
- 发明人: Zahra Hadjizadeh-Amini
- 申请人: Zahra Hadjizadeh-Amini
- 申请人地址: CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: CA Sunnyvale
- 主分类号: H01L21/311
- IPC分类号: H01L21/311 ; H01L21/336
摘要:
A method of forming and removing spacers used to mask lightly doped drain (LDD) regions in the formation of a field effect transistor (FET) involves depositing a thin silicon nitride (Si.sub.3 N.sub.4) layer over the active region of a substrate, a gate structure formed on the active region, and over the field oxide regions. A silicon oxide (SiO.sub.2) film is provided over the nitride and then etched to form LDD spacers at the ends of the gate. The etchant used to etch the oxide layer selectively etches oxide at least 20 times faster than nitride. The nitride layer protects the field oxide regions from etching, thereby preventing oxide loss. The spacers are used to mask regions in the substrate during the implantation of source and drain regions, and the masked regions become the LDD regions. After implanting the source and drain regions, the nitride layer may be removed with a wet etchant which selectively etches nitride. The LDD spacers will be lifted off by the removal of the nitride layer or the spacer may be removed with a wet etchant which selectively etches silicon oxide followed by a nitride wet etchant which selectively etches nitride.