An ISDN communication controller or a multi-circuit communication controller is implemented in a sheet of communication adapter board. For each channel or circuit, a dedicated subprocessor section conducts communication processing. In each subprocessor section, a local bus is disposed to connect a CPU, a serial controller, and an RAM. In a main processor section controlling the subprocessors, a local bus is employed to connect a CPU, an RAM, and an ROM. In a system processor section exclusively achieving information processing, a system bus is used to connect a CPU and a main memory. The local buses are connected via respective controllers to an upper-level local bus. A shared RAM is connected via a controller to the upper-level local bus and the system bus. The controllers of the subprocessor sections translate addresses to be outputted from the main processor section to the upper-level local bus to supply translated addresses to the respective local bus.