发明授权
US5206827A Iterative high radix divider decoding the upper bits of a divisor and dividend 失效
重组高分辨率分解器(DIVIDER)解码分部和部分的上位

  • 专利标题: Iterative high radix divider decoding the upper bits of a divisor and dividend
  • 专利标题(中): 重组高分辨率分解器(DIVIDER)解码分部和部分的上位
  • 申请号: US682902
    申请日: 1991-04-09
  • 公开(公告)号: US5206827A
    公开(公告)日: 1993-04-27
  • 发明人: Hideyo Tsuruta
  • 申请人: Hideyo Tsuruta
  • 申请人地址: JPX Osaka
  • 专利权人: Matsushita Electric Co., Ltd.
  • 当前专利权人: Matsushita Electric Co., Ltd.
  • 当前专利权人地址: JPX Osaka
  • 优先权: JPX2-95759 19900410; JPX3-071405 19910404
  • 主分类号: G06F7/483
  • IPC分类号: G06F7/483 G06F7/52 G06F7/535
Iterative high radix divider decoding the upper bits of a divisor and
dividend
摘要:
A divider unit is provided for a high-radix division using a partial remainder. A quotient digit selecting device selects one from all quotient digits obtainable under an applied radix based on the signs and the upper digit values of the divisor and the partial remainder represented in the two's complement representation or, alternatively, on the upper digit values of the divisor and the partial remainder represented in the redundant binary representation. A number of divisor's multiple generating devices each generate at least one of 0 and a value obtained by multiplying the divisor with 2.sup.j (j=integer). At least one adding and subtracting device provides at least three inputs to generate a first product corresponding to any desired multiple of the divisor by adding or subtracting the outputs from the multiple generating devices and to generate another partial remainder by adding or subtracting the first product with a second product corresponding to a value obtained by multiplying the partial remainder by the radix.
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