A horizontal synchronizing reference signal producing circuit produces an internal horizontal synchronizing reference based upon an inputted clock and a reset pulse, a phase comparator compares the phases of a given external horizontal synchronizing reference and an internal horizontal synchronizing reference outputted by the horizontal synchronizing reference and generates a voltage signal conforming to a difference between the two compared phases. A low-pass filter then passes low-frequency components of the voltage signal outputted by the phase comparator, a VCO, whose frequency is controlled by an output voltage signal from the low-pass filter, generates a clock applied to the horizontal synchronizing reference signal producing circuit, a decision circuit determines whether the phase difference between the internal and external horizontal synchronizing reference signal lies within a range in which follow up is capable of being performed by the VCO. A reset pulse generator then generates a reset pulse synchronized to a prescribed edge of the external horizontal synchronizing reference and a reset control circuit inhibits input of the reset to the horizontal synchronizing reference signal producing circuit when the decision circuit determines that the phase difference lies within the follow-up range, and applies the reset signal to the horizontal synchronizing reference signal producing circuit when the decision circuit determines that the phase difference lies outside the follow-up range.