公开(公告)号：US20110241211A1

公开(公告)日：2011-10-06

申请号：US13164180

申请日：2011-06-20

申请人： Shinichi AKIYAMA ,  Kazuo KAWAMURA ,  Hisaya SAKAI ,  Hirofumi WATATANI ,  Kazuya OKUBO

发明人： Shinichi AKIYAMA ,  Kazuo KAWAMURA ,  Hisaya SAKAI ,  Hirofumi WATATANI ,  Kazuya OKUBO

IPC分类号： H01L23/532

CPC分类号： H01L23/53238 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76865 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device has forming, in a dielectric film, a first opening and a second opening located in the first opening, forming a first metal film containing a first metal over a whole surface, etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the whole surface, and burying a conductive material in the second opening and the first opening.

摘要翻译： 制造半导体器件的方法在电介质膜中形成位于第一开口中的第一开口和第二开口，在整个表面上形成含有第一金属的第一金属膜，在底部蚀刻第一金属膜 的第二开口，并且在整个表面上形成含有第二金属的第二金属膜，并且在第二开口和第一开口中埋入导电材料。

公开(公告)号：US08030207B2

公开(公告)日：2011-10-04

申请号：US12110662

申请日：2008-04-28

申请人： Shinichi Akiyama ,  Kazuo Kawamura ,  Hisaya Sakai ,  Hirofumi Watatani ,  Kazuya Okubo

发明人： Shinichi Akiyama ,  Kazuo Kawamura ,  Hisaya Sakai ,  Hirofumi Watatani ,  Kazuya Okubo

IPC分类号： H01L21/4763 ,  H01L21/302

CPC分类号： H01L23/53238 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76865 ,  H01L21/76873 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device has forming, in a dielectric film, a first opening and a second opening located in the first opening, forming a first metal film containing a first metal over a whole surface, etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the whole surface, and burying a conductive material in the second opening and the first opening.

摘要翻译： 制造半导体器件的方法在电介质膜中形成位于第一开口中的第一开口和第二开口，在整个表面上形成含有第一金属的第一金属膜，在底部蚀刻第一金属膜 的第二开口，并且在整个表面上形成含有第二金属的第二金属膜，并且在第二开口和第一开口中埋入导电材料。

公开(公告)号：US07977194B2

公开(公告)日：2011-07-12

申请号：US11492199

申请日：2006-07-25

申请人： Hidenobu Fukutome ,  Hiroyuki Ohta ,  Kazuo Kawamura ,  Kimihiko Hosaka

发明人： Hidenobu Fukutome ,  Hiroyuki Ohta ,  Kazuo Kawamura ,  Kimihiko Hosaka

IPC分类号： H01L21/8234

CPC分类号： H01L21/823443 ,  H01L21/28097 ,  H01L21/823456 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： A method for fabricating a semiconductor device includes the steps of: forming a first MISFET including first source/drain regions and a first gate electrode of a polycrystalline silicon, and a second MISFET including second source/drain regions and a second gate electrode of a polycrystalline silicon and having a gate length larger than that of the first gate electrode; and substituting the polycrystalline silicon forming the first and the second gate electrodes with a metal silicide. In the step of substituting the polycrystalline silicon with the metal silicide, the polycrystalline silicon forming the first gate electrode is totally substituted with the metal silicide and a part of polycrystalline silicon forming the second gate electrode is substituted with the metal silicide by utilizing that the gate length of the second gate electrode is larger than the gate length of the first gate electrode.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：形成第一MISFET，其包括多晶硅的第一源极/漏极区域和第一栅极电极，以及包括第二源极/漏极区域和第二栅极电极的第二MISFET， 硅，其栅极长度大于第一栅电极的栅极长度; 以及用金属硅化物代替形成第一和第二栅电极的多晶硅。 在用金属硅化物代替多晶硅的步骤中，形成第一栅电极的多晶硅完全被金属硅化物置换，并且形成第二栅极的部分多晶硅被金属硅化物取代，利用栅极 第二栅电极的长度大于第一栅电极的栅极长度。

公开(公告)号：US07829461B2

公开(公告)日：2010-11-09

申请号：US11898409

申请日：2007-09-12

申请人： Kazuo Kawamura ,  Shinichi Akiyama

发明人： Kazuo Kawamura ,  Shinichi Akiyama

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/26506 ,  H01L21/28052 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656

摘要： A semiconductor device fabrication method by which the thermal stability of nickel silicide can be improved. Nickel (or a nickel alloy) is formed over a semiconductor substrate on which a gate region, a source region, and a drain region are formed. Dinickel silicide is formed by performing a first annealing step, followed by a selective etching step. By performing a plasma treatment step, plasma which contains hydrogen ions is generated and the hydrogen ions are implanted in the dinickel silicide or the gate region, the source region, and the drain region under the dinickel silicide. The dinickel silicide is phase-transformed into nickel silicide by performing a second annealing step.

摘要翻译： 可以提高硅化镍的热稳定性的半导体器件制造方法。 镍（或镍合金）形成在其上形成有栅极区，源极区和漏极区的半导体衬底上。 通过进行第一退火步骤，然后进行选择性蚀刻步骤来形成硅化镍。 通过进行等离子体处理步骤，产生含有氢离子的等离子体，并且将氢离子注入硅化二锡或硅化二锡内的栅极区，源极区和漏极区。 通过进行第二退火步骤，将二锡硅化物相转化成硅化镍。

公开(公告)号：US20100165179A1

公开(公告)日：2010-07-01

申请号：US12646768

申请日：2009-12-23

申请人： Kazuo KAWAMURA

发明人： Kazuo KAWAMURA

IPC分类号： H04N5/222

CPC分类号： H04N5/2354 ,  H04N5/35554 ,  H04N5/35572 ,  H04N5/35581

摘要： An imaging method for taking an image using an imaging apparatus including an imaging device which includes first rows of pixels including first groups of light receiving elements and second rows of pixels including second groups of light receiving elements; first charge transfer lines; and second charge transfer lines, includes steps of: consecutively performing a subject-illuminating imaging and a subject-non-illuminating imaging, responsive to an input of an imaging instruction; reading out the charges accumulated in the first groups and the second groups of light receiving elements, and transferring the charges via the first and second charge transfer lines, respectively, after the subject-illuminating imaging and the subject-non-illuminating imaging; and acquiring an image by the subject-illuminating imaging and an image by the subject-non-illuminating imaging from the charges having been read out and transferred from the first groups and the second groups of light receiving elements, respectively.

摘要翻译： 一种使用包括成像装置的成像装置拍摄图像的成像方法，所述成像装置包括包括第一组光接收元件的第一行像素和包括第二组光接收元件的第二列像素; 第一电荷转移线; 和第二电荷转移线，包括以下步骤：响应于成像指令的输入，连续执行被摄体照明成像和被摄体非照明成像; 读取在第一组和第二组光接收元件中累积的电荷，并且在被摄体照明成像和被摄体非照明成像之后分别经由第一和第二电荷转移线传送电荷; 以及分别从已经从第一组和第二组光接收元件读出并传送的电荷通过被摄体照明成像获得被摄体照明成像和图像的图像。

公开(公告)号：US07407888B2

公开(公告)日：2008-08-05

申请号：US11355992

申请日：2006-02-17

申请人： Takeshi Ito ,  Satoshi Inagaki ,  Yasunori Uchino ,  Kazuo Kawamura

发明人： Takeshi Ito ,  Satoshi Inagaki ,  Yasunori Uchino ,  Kazuo Kawamura

IPC分类号： H01L21/44

CPC分类号： H01L21/76814 ,  H01L21/76846 ,  H01L21/76877

摘要： A method of fabricating a semiconductor device comprises the steps of forming a contact hole in an insulation film so as to extend therethrough and so as to expose a conductor body at a bottom part of the contact hole, forming a barrier metal film of tungsten nitride on the bottom part and a sidewall surface of the contact hole with a conformal shape to the bottom part and the sidewall surface of the contact hole, forming a tungsten layer so as to fill the contact hole via the barrier metal film, and forming a tungsten plug in the contact hole by the tungsten layer by polishing away a part of the tungsten film on the insulation film until a surface of the insulation film is exposed, wherein there is conducted a step of cleaning a surface of the conductor body prior to the forming step of the barrier metal film.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在绝缘膜中形成接触孔以便延伸穿过其中，以便在接触孔的底部露出导体，形成氮化钨的阻挡金属膜 接触孔的底部和侧壁表面具有与接触孔的底部和侧壁表面的共形形状，形成钨层，以便通过阻挡金属膜填充接触孔，并形成钨丝塞 在所述接触孔中，通过在所述绝缘膜上抛光所述钨膜的一部分直到所述绝缘膜的表面露出来，在所述接触孔中，在所述形成步骤之前，进行清洁所述导体主体的表面的步骤 的阻隔金属膜。

公开(公告)号：US07390707B2

公开(公告)日：2008-06-24

申请号：US11220865

申请日：2005-09-08

申请人： Kazuo Kawamura ,  Yosuke Shimamune

发明人： Kazuo Kawamura ,  Yosuke Shimamune

IPC分类号： H01L21/336

CPC分类号： H01L21/28518 ,  H01L21/26506 ,  H01L21/28525 ,  H01L21/76829 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： The semiconductor device fabrication method comprising the step of forming a gate electrode on a semiconductor substrate; the step of forming a source/drain diffused layer in the semiconductor substrate on both sides of the gate electrode; the step of burying a silicon germanium layer in the source/drain diffused layer; the step of forming an amorphous layer at an upper part of the silicon germanium layer; the step of forming a nickel film on the amorphous layer; and the step of making thermal processing to react the nickel film and the amorphous layer with each other to form a silicide film on the silicon germanium layer.

摘要翻译： 半导体器件制造方法包括在半导体衬底上形成栅电极的步骤; 在栅电极两侧的半导体衬底中形成源极/漏极扩散层的步骤; 将硅锗层埋在源极/漏极扩散层中的步骤; 在硅锗层的上部形成非晶层的步骤; 在非晶层上形成镍膜的步骤; 以及使热处理使镍膜和非晶层彼此反应以在硅锗层上形成硅化物膜的步骤。

公开(公告)号：US20060284317A1

公开(公告)日：2006-12-21

申请号：US11355992

申请日：2006-02-17

申请人： Takeshi Ito ,  Satoshi Inagaki ,  Yasunori Uchino ,  Kazuo Kawamura

发明人： Takeshi Ito ,  Satoshi Inagaki ,  Yasunori Uchino ,  Kazuo Kawamura

IPC分类号： H01L23/52

CPC分类号： H01L21/76814 ,  H01L21/76846 ,  H01L21/76877

摘要： A method of fabricating a semiconductor device comprises the steps of forming a contact hole in an insulation film so as to extend therethrough and so as to expose a conductor body at a bottom part of the contact hole, forming a barrier metal film of tungsten nitride on the bottom part and a sidewall surface of the contact hole with a conformal shape to the bottom part and the sidewall surface of the contact hole, forming a tungsten layer so as to fill the contact hole via the barrier metal film, and forming a tungsten plug in the contact hole by the tungsten layer by polishing away a part of the tungsten film on the insulation film until a surface of the insulation film is exposed, wherein there is conducted a step of cleaning a surface of the conductor body prior to the forming step of the barrier metal film.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在绝缘膜中形成接触孔以便延伸穿过其中，以便在接触孔的底部露出导体，形成氮化钨的阻挡金属膜 接触孔的底部和侧壁表面具有与接触孔的底部和侧壁表面的共形形状，形成钨层，以便通过阻挡金属膜填充接触孔，并形成钨丝塞 在所述接触孔中，通过在所述绝缘膜上抛光所述钨膜的一部分直到所述绝缘膜的表面露出来，在所述接触孔中，在所述形成步骤之前，进行清洁所述导体主体的表面的步骤 的阻隔金属膜。

公开(公告)号：US20060125022A1

公开(公告)日：2006-06-15

申请号：US11100501

申请日：2005-04-07

申请人： Kazuo Kawamura

发明人： Kazuo Kawamura

IPC分类号： H01L29/76 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： The method for fabricating a semiconductor device comprises the step of forming a Co film 72 on a gate electrode 30 having a gate length Lg of below 50 nm including 50 nm; the first thermal processing step of making thermal processing to react the Co film 72 and the gate electrode 30 with each other to form a CoSi film 76a on the upper part of the gate electrode 30; the step of selectively etching off the unreacted part of the Co film 72; and the second thermal processing step of making thermal processing to react the CoSi film 76a and the gate electrode 30 with each other to form a CoSi2 film 42a on the upper part of the gate electrode 30, wherein in the first thermal processing step, the CoSi film 76a is formed so that the ratio h/w of the height h of the CoSi film 76a to the width w of the CoSi film 76a is below 0.7 including 0.7.

摘要翻译： 制造半导体器件的方法包括在栅极长度L <50nm的栅电极30上形成包括50nm的Co膜72的步骤; 第一热处理步骤使热处理使Co膜72和栅电极30彼此反应，以在栅电极30的上部形成CoSi膜76a; 选择性地蚀刻掉Co膜72的未反应部分的步骤; 以及第二热处理步骤，使热处理使CoSi膜76a和栅电极30彼此反应，以在栅电极30的上部形成CoSi 2膜42a， 其中在第一热处理步骤中，形成CoSi膜76a，使得CoSi膜76a的高度h与CoSi膜76a的宽度w的比h / w小于0.7，包括0.7。

公开(公告)号：US20060079087A1

公开(公告)日：2006-04-13

申请号：US11041217

申请日：2005-01-25

申请人： Kazuo Kawamura ,  Satoshi Inagaki ,  Takashi Saiki ,  Ryou Nakamura

发明人： Kazuo Kawamura ,  Satoshi Inagaki ,  Takashi Saiki ,  Ryou Nakamura

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L21/336

CPC分类号： H01L21/02186 ,  H01L21/26513 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/318 ,  H01L29/4933 ,  H01L29/665

摘要： A method of producing a semiconductor device is disclosed that is able to reduce fluctuations of a sheet resistance of a silicide layer in the semiconductor device formed by a salicide process. When depositing a titanium nitride film on a cobalt film in the salicide process, the thickness of the titanium nitride film is set to be sufficiently small so that a nano-grain structure or an amorphous structure is formed in the titanium nitride film. In the titanium nitride film, the titanium composition is enriched.

摘要翻译： 公开了一种制造半导体器件的方法，其能够减少通过自对准硅化物工艺形成的半导体器件中的硅化物层的薄层电阻的波动。 当在自对准硅化物工艺中在钴膜上沉积氮化钛膜时，将氮化钛膜的厚度设定得足够小，使得在氮化钛膜中形成纳米晶粒结构或非晶结构。 在氮化钛膜中，钛组合物富集。