A fuzzy hardware system includes a sampling circuit which carries out sampling of a first membership function in generate a fuzzy set consisting of a plurality of singletons, and an arithmetic circuit which carries out arithmetic processes in accordance with supplied signals each having either characteristic of a pulse width and a number of pulses corresponding to a size of the singletons. In the arithmetic circuit, minimum and maximum arithmetic processes are carried out by AND and OR gates. Such arithmetic processes are carried out by either process of serial, parallel and combinations of serial and parallel.