Abstract:
In an apparatus for testing a counter circuit, a test pattern is used to drive the counter circuit to obtain an output pattern. The output pattern is compared with an expected pattern in synchronization with the test pattern, thereby determining whether or not the counter circuit is normal. A phase between the output pattern and the expected pattern is initially adjusted by the testing apparatus.
Abstract:
A probe for an in-circuit emulator for use in program verification and debugging during development of an equipment using a microcomputer is disclosed. The probe is formed by a flexible printed circuit board on which a plurality of conductive lines and a plurality of solder-connecting elements are provided. The conductive lines and the solder-connecting elements are electrically connected through a plurality of through-holes provided in the flexible printed circuit board. The solder-connecting elements of the probe are solder-connected to conductive lines of a target board to be emulated. The in-circuit emulator does not require a dummy chip, which makes the probe simple in its structure and economical in the fabrication thereof.
Abstract:
A method of manufacturing a reflecting mirror is proposed which includes a double nickel layer plated on a stainless steel sheet as a base material. After buffing, the base material is immersed in a 4 to 9% solution of hydrochloric acid to remove any oxide thereon, thus performing a pre-treatment step. The method also features a pre-plating step which forms an initial plated nickel layer on the surface of the base material, using a bath composition comprising 150 to 300g/l of nickel chloride and 3.6 to 36g/l of hydrochloric acid. The method also includes a bright nickel plating step which employs a standard Watts bath.
Abstract:
A toilet stool capable of being seated for use in defecation or urination, and a toilet stool for use in defecation or urination which is characterized by mounting a toilet seat whose opening width can be varied. The toilet stool comprises a toilet seat having two foliar plates capable of freely falling onto the upper surface of a peripheral edge portion of the toilet stool as a pedestal and a toilet lid mounted on the toilet seat; wherein the foliar plates of the toilet seat is linked to the driving portion of the rear portion of the toilet seat so that the foliar plates of the toilet seat vary the opening width of the toilet seat.
Abstract:
A delay circuit comprises cascade-connected first through third inverters. The second inverter comprises a first resistor one terminal of which is connected to an output of the first inverter; a P-channel MOS transistor a gate of which is connected to the other terminal of the first resistor, and a source of which receives a power supply voltage; an N-channel MOS transistor a gate of which is connected to the other terminal of the first resistor, a source of which receives a ground voltage, and a drain of which is connected to a drain of the P-channel MOS transistor; and a capacitor one terminal of which is connected to the other terminal of the first resistor, and the other terminal of which is connected to the other terminal of a current path of the P-channel MOS transistor. The P-channel MOS transistor and the N-channel MOS transistor switch among a first state in which the P-channel MOS transistor operates in a saturation region and the N-channel MOS transistor operates in a cutoff region, a second state in which the P-channel MOS transistor operates in an active region and the N-channel MOS transistor operates in the active region, and a third state in which the P-channel MOS transistor operates in the cutoff region and the N-channel MOS transistor operates in the saturation region.
Abstract:
A fuzzy hardware system includes a sampling circuit which carries out sampling of a first membership function in generate a fuzzy set consisting of a plurality of singletons, and an arithmetic circuit which carries out arithmetic processes in accordance with supplied signals each having either characteristic of a pulse width and a number of pulses corresponding to a size of the singletons. In the arithmetic circuit, minimum and maximum arithmetic processes are carried out by AND and OR gates. Such arithmetic processes are carried out by either process of serial, parallel and combinations of serial and parallel.
Abstract:
A data format is formed by a start code, an identification code and its inverted code, a first data code and a second data code, each of these codes being a single byte code, which is then followed by an interrupt arbitration period. Thus, when compared with a prior art data format, an inverted data code and an stop code of the prior art one are replaced respectively by the second data code and the interrupt arbitration period TI to realize upper compatibility. A remote controller transmitting a signal transmits an acknowledge code or a non-acknowledge code within the interrupt arbitration period depending on the interrupt code it receives after its current signal transmitting operation is temporarily switched to a signal receiving operation within the interrupt arbitration period.
Abstract:
A link mechanism, such as a panhard rod or the like, has a rod section and a collar section at each of its two ends. One collar section is supported on the case side bracket through a bushing. The other collar section is supported on the body side bracket through a bushing. A mass is provided at each collar section for limiting vibrations. Each mass is configured so that its principal inertia axis coincides with the principal elastic axis of its bushing in at least one direction of the bending vibration mode of the rod section so that the nodes of the bending vibration mode of the panhard rod also coincide with the principal inertia axis of the mass and thus the principal elastic axis of the bushing. This significantly dampens the vibrations imparted to the link mechanism.
Abstract:
An optimization compiler performs computation of hamming's distance between address of respective instruction of the temporarily arranged program string and a next execution address after temporary arrangement of program modules. Next, the optimization compiler checks whether a portion of the program string where address distance is smaller than a predetermined value has been optimized in the temporarily arranged program string. If not optimized, modifying process of branching condition or so forth for the instruction is performed. Finally, the optimization compiler further checks whether a portion of the program string where address distance is greater than or equal to the predetermined value. If not optimized, rearrangement of the program modules is performed.