An amplifier arrangement includes a first amplifier (A1) having a first output terminal (5) for the connection of a first terminal of a load and having at least a first power transistor (PT1) with a main current path for carrying a first current (i1), which current (i1) is related to a first load current flowing via the first output terminal (5), a second amplifier (A2) having a second output terminal (6) for the connection of a second terminal of the load and having at least a second power transistor (PT2) with a main current path for carrying a second current (i2), which current (i2) is related to a second load current flowing via the second output terminal (6) a first circuit (M1) for generating a first signal (s1), which signal (s1) is related to the first current (i1), a second circuit (M2) for generating a second signal (s2), which signal (s2) is related to the second current (i2), a third circuit (M3) for generating at least one control signal (r1, r2), which control signal (r1, r2) is related to a sum of the first (s1) and the second (s2) signal, and a protection circuit for limiting the first and the second load current depending upon the control signal (r1, r2), the third circuit (M3), in addition to being adapted to generate the control signal (r1, r2), being adapted to supply a first short-circuit current (k1) to one of the output terminals (5, 6) during a first short-circuit mode and to supply a second short-circuit current (k2) to one of the output terminal (5, 6) during a second short-circuit mode, which short-circuit currents (k1, k2) are related to the sum of the first (s1) and the second (s2) signal.