Amplifier arrangement for protecting the power transistors in case of a
short-circuit
    1.
    发明授权
    Amplifier arrangement for protecting the power transistors in case of a short-circuit 失效
    用于保护短路电路中功率晶体管的放大器布置

    公开(公告)号:US5229733A

    公开(公告)日:1993-07-20

    申请号:US889032

    申请日:1992-05-26

    IPC分类号: H03F1/52

    CPC分类号: H03F1/52

    摘要: An amplifier arrangement includes a first amplifier (A1) having a first output terminal (5) for the connection of a first terminal of a load and having at least a first power transistor (PT1) with a main current path for carrying a first current (i1), which current (i1) is related to a first load current flowing via the first output terminal (5), a second amplifier (A2) having a second output terminal (6) for the connection of a second terminal of the load and having at least a second power transistor (PT2) with a main current path for carrying a second current (i2), which current (i2) is related to a second load current flowing via the second output terminal (6) a first circuit (M1) for generating a first signal (s1), which signal (s1) is related to the first current (i1), a second circuit (M2) for generating a second signal (s2), which signal (s2) is related to the second current (i2), a third circuit (M3) for generating at least one control signal (r1, r2), which control signal (r1, r2) is related to a sum of the first (s1) and the second (s2) signal, and a protection circuit for limiting the first and the second load current depending upon the control signal (r1, r2), the third circuit (M3), in addition to being adapted to generate the control signal (r1, r2), being adapted to supply a first short-circuit current (k1) to one of the output terminals (5, 6) during a first short-circuit mode and to supply a second short-circuit current (k2) to one of the output terminal (5, 6) during a second short-circuit mode, which short-circuit currents (k1, k2) are related to the sum of the first (s1) and the second (s2) signal.

    Method and circuit arrangement for esd protection of a connection terminal
    2.
    发明申请
    Method and circuit arrangement for esd protection of a connection terminal 审中-公开
    连接端子esd保护的方法和电路布置

    公开(公告)号:US20060018063A1

    公开(公告)日:2006-01-26

    申请号:US10536272

    申请日:2003-11-12

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0255 H01L27/0248

    摘要: The present invention relates to a method and a circuit arrangement for protecting a connection terminal (CANH, CANL) of a semiconductor device against electrostatic discharge (ESD), wherein first and second common nodes (N1, N2) protected against ESD of respective first and second polarities are provided. Connection terminals are coupled via first diode means (D5, D6) to the first common node and via second diode means (D7, D8) to the second common node. Thus, several terminals or pins can share the same ESD protection device by connecting them to the first and second common nodes. Due to the fact that a diode requires a smaller chip area than a protection diode, the total chip area can be reduced.

    摘要翻译: 本发明涉及一种用于保护半导体器件的连接端子(CANH,CANL)抵抗静电放电(ESD)的方法和电路装置,其中第一和第二公共节点(N 1,N 2)受到相应的ESD保护 提供第一和第二极性。 连接端子经由第一二极管装置(D 5,D 6)耦合到第一公共节点,并且经由第二二极管装置(D 7,D 8)耦合到第二公共节点。 因此,几个端子或引脚可以通过将它们连接到第一和第二公共节点来共享相同的ESD保护装置。 由于二极管需要比保护二极管更小的芯片面积的事实,可以减少总芯片面积。

    Amplifier with short-circuit protection
    3.
    发明授权
    Amplifier with short-circuit protection 失效
    具有短路保护功能的放大器

    公开(公告)号:US5097225A

    公开(公告)日:1992-03-17

    申请号:US547740

    申请日:1990-07-03

    IPC分类号: H03F3/343 H03F1/52

    CPC分类号: H03F1/52

    摘要: An amplifier circuit in which a first amplifier (A1) and a second amplifier (A2) are protected against short-circuits by a protection apparatus which includes a first device (M1), a second device (M2), a third device (M3) and a protection device (B). For this purpose the first device and the second device generate four signals (s1, s2, s3, s4) related to an equal number of currents (i1, i2, i3, i4), which currents are related to a first or a second load current in the first amplifier or in the second amplifier. In order to control the protection device (B), the third device generates at least two control signals (r1, r2) related to the signal currents (s1, s2, s3, s4), use being made of the equality of the load currents in the absence of short-circuits.

    Active switching star node and network of stations interconnected by such a star node
    4.
    发明授权
    Active switching star node and network of stations interconnected by such a star node 有权
    主动切换星形节点和由这样的星形节点互连的台站网络

    公开(公告)号:US07095751B2

    公开(公告)日:2006-08-22

    申请号:US10095398

    申请日:2002-03-11

    IPC分类号: H04L12/28 H04L12/56

    CPC分类号: H04L12/44

    摘要: In a network a star node (SN1) interconnects a plurality of stations (ST1–ST3). The star node (SN1) has interfaces (I1–I3), each having a connection terminal (BP) for connecting a selected one of the stations to the star node (SN1) and each interface receives at a connection terminal (BP) a signal from the station associated with that interface and forwards the received signal to the connection terminal (BP) of the other interfaces. The star node (SN1) further has a common terminal (RT1) and each interface has a receiver (CMP1) coupled to the connection terminal (BP) for receiving the signal from the associated station, a transmitter (TR) coupled to the connection terminal (BP), a first activity detector (A1) for generating a first activity signal (AS1) in response to signal transitions at an input (CIP1) of the receiver (CMP1), a second activity detector (A2) for generating a second activity signal (AS2) in response to signal transitions at the common terminal (RT1), a first switch (SW1) for disabling signal transfer from the receiver (CMP1) to the common terminal (RT1) in response to the second activity signal (AS2), and a second switch (SW2) for disabling signal transfer from the common terminal (RT1) to the transmitter (TR) in response to the first activity signal (AS1). The structure of the interface allows easy expansion of the number of interfaces within the star node (SN1) and a data protocol without a preamble.

    摘要翻译: 在网络中,星形节点(SN 1)互连多个站(ST 1 -ST 3)。 星型节点(SN 1)具有接口(I 1 -I 3),每个接口具有连接端子(BP),用于将所选择的一个站点连接到星形节点(SN 1),并且每个接口在连接终端 BP)来自与该接口相关联的站的信号,并将接收到的信号转发到其他接口的连接终端(BP)。 星形节点(SN 1)还具有公共终端(RT 1),并且每个接口具有耦合到连接终端(BP)的接收机(CMP 1),用于从相关联的站接收信号;发射机(TR),耦合到 连接端子(BP),用于响应于接收器(CMP1)的输入端(CIP1)处的信号转换而产生第一活动信号(AS 1)的第一活动检测器(A 1),第二活动检测器 A 2),用于响应于公共端(RT 1)处的信号转换而产生第二活动信号(AS 2),用于禁止从接收机(CMP 1)到公共终端(CMP1)的信号传输的第一开关(SW 1) 响应于第二活动信号(AS 2)的第二开关(SW 2)和用于响应于第一活动信号(AS)而禁用从公共端(RT 1)到发射器(TR)的信号传输的第二开关(SW 2) 1)。 接口的结构允许容易地扩展星形节点(SN 1)内的接口数量和无前导码的数据协议。

    Line driver for supplying symmetrical output signals to a two-wire communication bus
    5.
    发明授权
    Line driver for supplying symmetrical output signals to a two-wire communication bus 有权
    用于向双线通信总线提供对称输出信号的线路驱动器

    公开(公告)号:US06650144B2

    公开(公告)日:2003-11-18

    申请号:US10022381

    申请日:2001-10-30

    申请人: Hendrik Boezen

    发明人: Hendrik Boezen

    IPC分类号: H03K190175

    CPC分类号: H04L25/0274 H04L25/028

    摘要: A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6). Owing to the propagation delay of the inverters and the additive effect of the resistors the voltages on the bus wires change only in successive small steps. This results in a small common mode voltage on the bus wires and, consequently, a low electromagnetic emission.

    摘要翻译: 用于驱动由一系列逆变器(I1,...,I6)组成的两线通信总线(8,9)的线路驱动器。 每个反相器可以由PMOS(M1)和NMOS(M2)晶体管的串联布置组成。 奇数型逆变器(I1,I3,I5)的输出端子(1b,3b,5b)通过各自的第一电阻器(R1,R3,R5)与母线的第一导线(8)连接,输出端子 偶数转换器(I2,I4,I6)的二极管(2b,4b,6b)通过各自的第二电阻器(R2,R4,R6)连接到母线的第二线(9)。由于传播延迟 逆变器和电阻器的叠加效应,母线上的电压仅在连续的小步骤中改变。 这导致总线上的共模电压较小,因此导致低电磁辐射。

    Switching bridge amplifier
    6.
    发明授权
    Switching bridge amplifier 失效
    开关桥式放大器

    公开(公告)号:US5157347A

    公开(公告)日:1992-10-20

    申请号:US822493

    申请日:1992-01-17

    CPC分类号: H03F3/3081 H03F1/0244

    摘要: Bridge amplifier circuit including a linear amplifier stage (3) which in single-ended configuration drives a load (13). Once the output voltage (U.sub.0) at the output (7) of the amplifier stage (3) has reached the maximum or minimum output swing limit, the voltage on the load terminal (14) remote from the output (7) is either reduced or increased by a switch circuit (15) in response to control signals (36) originating from control means (37) in dependence on the input signal (U.sub.i) and/or the output signal (U.sub.0). The switch circuit (15) includes a bidirectional switch (16) arranged as two controllable diodes (90, T.sub.11) connected in anti-parallel and having very little forward bias. Compensating voltage jumps at the output (7) of the amplifier stage (3), which require a high slew rate, are avoided in this manner.

    Communication bus system operable in a sleep mode and a normal mode
    7.
    发明授权
    Communication bus system operable in a sleep mode and a normal mode 有权
    通信总线系统在睡眠模式和正常模式下可操作

    公开(公告)号:US07424315B2

    公开(公告)日:2008-09-09

    申请号:US10499401

    申请日:2002-12-10

    摘要: The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a normal mode. The transceiver circuit (124, 164) is powered down in a sleep mode. A detector circuit (120, 160) detects an incoming message (41) when the relay circuit (12, 14, 16) is in a sleep mode. A mode control circuit (122, 162) powers up the transceiver (124, 164) in response to detection of an incoming message (21). Steps are taken that ensure, in the normal mode, that messages (21) will not be relayed in unreadable form. The mode control circuit (122, 162) is arranged to cause the transceiver (124, 164) to relay a remainder (25) of the incoming message (21) after power up. In an embodiment the power needed to transmit the remainder (25) of the message (21) is drained from a capacitor (306) in the power supply (30) before the power supply (30) controls the power supply voltage in the normal mode. In another embodiment the detector circuit (120, 160) temporarily controls the direction of operation of the transceivers (124, 164) at the start of the normal mode instead of further detectors (58a-d) that normally control the direction of operation in the normal mode.

    摘要翻译: 通信总线系统包括耦合节点电路(10a-d)的多个节点电路(10a-d)和继电器电路(12,14,16)。 继电器电路(12,14,16)具有用于以正常模式中继节点电路(10a-d)之间的消息(21)的收发器电路(124,164)。 在休眠模式下,收发器电路(124,164)被掉电。 当继电器电路(12,14,16)处于睡眠模式时,检测器电路(120,160)检测输入消息(41)。 模式控制电路(122,162)响应于输入消息(21)的检测,对收发器(124,164)供电。 采取步骤,确保在正常模式下,消息(21)将不会以不可读的形式进行中继。 模式控制电路(122,162)被布置成使得收发器(124,164)在上电之后中继输入消息(21)的余数(25)。 在一个实施例中,在电源(30)以正常模式控制电源电压之前,将消息(21)的剩余部分(25)所需的功率从电源(30)中的电容器(306)中排出 。 在另一个实施例中,检测器电路(120,160)在正常模式开始时临时控制收发器(124,164)的操作方向,而不是通常控制正常操作方向的另外的检测器(58 ad) 模式。

    Servosystem
    9.
    发明授权
    Servosystem 失效
    服务体系

    公开(公告)号:US5856732A

    公开(公告)日:1999-01-05

    申请号:US821631

    申请日:1997-03-20

    CPC分类号: G05B19/4062

    摘要: The servosystem includes adjusting means (1) for changing the position of mechanical element (3), a first transducer (5) for forming an adjusting voltage which is a measure of a desired position of the element, a second transducer (15) for forming a response voltage which is a measure of the actual position of the element, and detection means (13) for forming an error signal (If) which is a measure of a difference between the response voltage and the adjusting voltage. The detection means (13) have a first and a second input (11, 21) which are connected to the first transducer and the second transducer, respectively, and an output (23) which is connected to an input (27) of control means (29) for generating, in dependence on the value of the error signal, a control signal (Vc1, Vc2), for controlling the adjusting means. A compensation resistor (31) is inserted in the connection lead (9) between, for example the first transducer (5) and the input (11) of the detection means (13) connected thereto. The detection means (13) conduct a compensation current through the compensation resistor (31), which compensation current causes a voltage drop across the compensation resistor which is equal to the difference between the response voltage and the adjusting voltage, and form the error signal (If) so that its value is proportional to the value of the compensation current. Consequently, no control signal is applied to the adjusting means (1) if said connection (9) is interrupted.

    摘要翻译: 伺服系统包括用于改变机械元件(3)的位置的调节装置(1),用于形成调节电压的第一换能器(5),该调节电压是元件的期望位置的量度;第二换能器(15) 作为元件的实际位置的测量的响应电压,以及用于形成作为响应电压和调整电压之间的差的测量值的误差信号(If)的检测装置(13)。 检测装置(13)具有分别连接到第一换能器和第二换能器的第一和第二输入端(11,21)和连接到控制装置的输入端(27)的输出端(23) (29),用于根据误差信号的值产生用于控制调节装置的控制信号(Vc1,Vc2)。 补偿电阻器(31)插入连接引线(9)之间,例如第一传感器(5)和与其连接的检测装置(13)的输入端(11)之间。 检测装置(13)通过补偿电阻(31)传导补偿电流,该补偿电流导致补偿电阻器两端的电压降等于响应电压和调整电压之差,并形成误差信号( 如果),使其值与补偿电流的值成比例。 因此,如果所述连接(9)中断,则没有控制信号施加到调节装置(1)。

    Amplifier circuit with temperature compensation
    10.
    发明授权
    Amplifier circuit with temperature compensation 失效
    具有温度补偿功能的放大器电路

    公开(公告)号:US5177454A

    公开(公告)日:1993-01-05

    申请号:US796170

    申请日:1991-11-22

    申请人: Hendrik Boezen

    发明人: Hendrik Boezen

    IPC分类号: H01L27/02 H03F1/30 H03F1/52

    摘要: A temperature compensated amplifier circuit includes a control transistor and an output transistor having a control electrode coupled to the main current path of the control transistor. The control electrode of the output transistor is also coupled to a current supply element which is connected in series with the main current path of the control transistor for supplying a bias current whose variation as a result of thermal cooupling between the current supply element and the output transistor is smaller than the variation of the part of the bias current through the main current path of the control transistor as a result of thermal coupling between the control transistor and the output transistor.