发明授权
- 专利标题： Interrupt handling in an asymmetric multiprocessor computer system
- 专利标题（中）： 非对称多处理器计算机系统中的中断处理
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申请号： US996526申请日： 1992-12-23
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公开(公告)号： US5247685A公开(公告)日： 1993-09-21
- 发明人: John A. Landry , Paul R. Culley
- 申请人： John A. Landry , Paul R. Culley
- 申请人地址： TX Houston
- 专利权人： Compaq Computer Corp.
- 当前专利权人： Compaq Computer Corp.
- 当前专利权人地址： TX Houston
- 主分类号： G06F13/26
- IPC分类号： G06F13/26
摘要：
Two independently operating microprocessors share common control, data and address buses. A first of the microprocessors is assigned, when it is on the buses, to respond to all maskable interrupts by causing placement of an interrupt vector on the bus at the start of the next bus cycle. When the second microprocessor is on the buses and a maskable interrupt is received, the start of the next bus cycle is inhibited from causing an interrupt vector to be placed on the bus.
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