发明授权
- 专利标题： Fault tolerant logic system
- 专利标题（中）： 容错逻辑系统
-
申请号： US693509申请日： 1991-04-30
-
公开(公告)号： US5260952A公开(公告)日： 1993-11-09
- 发明人: Kenneth E. Beilstein, Jr. , John A. Fifield , Lawrence G. Heller , Hsing-San Lee , Charles H. Stapper
- 申请人： Kenneth E. Beilstein, Jr. , John A. Fifield , Lawrence G. Heller , Hsing-San Lee , Charles H. Stapper
- 申请人地址： NY Armonk
- 专利权人： IBM Corporation
- 当前专利权人： IBM Corporation
- 当前专利权人地址： NY Armonk
- 主分类号： G01R31/317
- IPC分类号： G01R31/317 ; G06F11/08 ; G06F11/10 ; G06F11/16 ; G11C29/00 ; H03K19/00 ; H03K19/003 ; G01K31/28
摘要：
A logic system including a first logic block for providing first differential outputs; a second logic block, identical to the first logic block, for providing second differential outputs; a fault detecting device, coupled to the first logic block, for detecting a fault in the first differential outputs; and a selecting device, coupled to the first and second logic blocks and to the fault detecting device, for selecting an output of one of the first and second logic blocks depending on whether the fault detecting device detects a fault.