发明授权
US5276635A Method and apparatus for performing carry look-ahead addition in a data
processor
失效
用于在数据处理器中执行携带预先添加的方法和装置
- 专利标题: Method and apparatus for performing carry look-ahead addition in a data processor
- 专利标题(中): 用于在数据处理器中执行携带预先添加的方法和装置
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申请号: US69646申请日: 1993-06-01
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公开(公告)号: US5276635A公开(公告)日: 1994-01-04
- 发明人: Ajay Naini , William C. Anderson
- 申请人: Ajay Naini , William C. Anderson
- 申请人地址: IL Schaumburg
- 专利权人: Motorola, Inc.
- 当前专利权人: Motorola, Inc.
- 当前专利权人地址: IL Schaumburg
- 主分类号: G06F7/50
- IPC分类号: G06F7/50 ; G06F7/508
摘要:
A carry look-ahead (CLA) adder accommodates a late carry-in from a low-order external 32-bit adder to enable a 96-bit addition to be performed in the same time in which the CLA adder (60) performs a 64-bit addition. Within each adder slice, intermediate group propagate and group generate terms are generated for each bit location in the adder (60), while the adder simultaneously generates an n-bit group propagate and group generate term. The intermediate group propagate and group generate terms are combined with carry-in terms to generate, in parallel, local carry-out terms within each adder slice. The local carry-out terms and intermediate group propagate and group generate terms are used to form a carry chain path which allows the adder to delay the carry-in of an external carry term.
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