发明授权
- 专利标题: Dynamic random access memory
- 专利标题(中): 动态随机存取存储器
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申请号: US813674申请日: 1991-12-26
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公开(公告)号: US5282167A公开(公告)日: 1994-01-25
- 发明人: Hiroaki Tanaka , Masaru Koyanagi
- 申请人: Hiroaki Tanaka , Masaru Koyanagi
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX2-418765 19901227
- 主分类号: G01R31/28
- IPC分类号: G01R31/28 ; G11C11/401 ; G11C11/407 ; G11C11/408 ; G11C29/06 ; G11C29/50 ; H01L21/66 ; G11C7/02
摘要:
A DRAM according to the invention has noise-eliminating circuits. Each of the circuits has an output side thereof connected to a corresponding word line. At the time of a voltage stress examination, each of the circuits is controlled to be in an on-state thereby transmitting a voltage stress, input an input side thereof, to the word line. At the time of normal operation, the input side of the circuit is connected to an earth node, and each of the circuits is turned on and off in accordance with a signal output from a corresponding one of word line-selecting circuits or with the level of a corresponding one of the word lines.
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