发明授权
US5294890A Examination circuit for a sensor 失效
传感器检查电路

Examination circuit for a sensor
摘要:
The monitoring circuit for a sensor connected to a low-potential and high-potential line, such as a thermal element, includes a high-resistance pulldown resistor connected between the high potential line and ground, a offset voltage source connected to the low-potential line to supply an offset voltage higher than a minimum transistor control voltage; first and second testing transistor shaving control electrodes connected to respective ones of the lines via resistor arrangements; and a third testing transistor having a control electrode connected to an output of a p-type channel FET having a control electrode connected to one of the two sensor lines. Whether the operating state of the sensor is normal, involves a short circuit to ground or the supply voltage or an interruption of the sensor lines is determined by monitoring the switching states of the first testing transistor and a series combination of the second and third testing transistor.
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