发明授权
- 专利标题: Method for pattern inspection and apparatus therefor
- 专利标题(中): 图案检查方法及其设备
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申请号: US904892申请日: 1992-06-25
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公开(公告)号: US5301248A公开(公告)日: 1994-04-05
- 发明人: Ninomiya Takanori , Kazushi Yoshimura , Mineo Nomoto
- 申请人: Ninomiya Takanori , Kazushi Yoshimura , Mineo Nomoto
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX62-280920 19871109; JPX62-300282 19871130; JPX63-91309 19880415; JPX63-159103 19880629; JPX63-178234 19880719
- 主分类号: G01R31/308
- IPC分类号: G01R31/308 ; G06T7/00 ; G06K9/00
摘要:
A detected pattern is binarized, the binarized pattern is expanded, an image size is reduced while a connectivity of the expanded pattern is preserved and stored in a first memory. In turn, the binarized pattern is contracted, the image size is reduced while a connectivity of the contracted pattern is preserved and stored in a second memory. Then the expanded pattern is read out from the first memory and a connectivity of the pattern is selected. The contracted pattern is read out from the second pattern and the connectivity of the pattern is extracted. The selected connectivities are compared with the connectivity of a normal pattern to detect a non-coincidence. The circuit pattern having a short circuit or a semi-short circuit defect and a circuit pattern having an open circuit or a semi-open circuit defect are classified and selected in response to these non-coincidences. Further, a pattern shape stored in the first memory is analyzed to specify the position where the short circuit or a semi-short circuit defect is present.
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