发明授权
US5303377A Method for compiling computer instructions for increasing instruction
cache efficiency
失效
用于编译计算机指令以提高指令高速缓存效率的方法
- 专利标题： Method for compiling computer instructions for increasing instruction cache efficiency
- 专利标题（中）： 用于编译计算机指令以提高指令高速缓存效率的方法
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申请号： US500627申请日： 1990-03-27
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公开(公告)号： US5303377A公开(公告)日： 1994-04-12
- 发明人: Rajiv Gupta , Chi-Hung Chi
- 申请人： Rajiv Gupta , Chi-Hung Chi
- 申请人地址： NY New York
- 专利权人： North American Philips Corporation
- 当前专利权人： North American Philips Corporation
- 当前专利权人地址： NY New York
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F9/45 ; G06F12/12 ; G06F9/44
摘要：
Method for compiling program instructions to reduce instruction cache misses and instruction cache pollution. The program is analyzed for instructions which result in a non-sequential transfer of control in the program. The presence of branch instructions and program loops are identified and analyzed. The instructions are placed in lines, and the lines are placed in a sequence to minimize potential misses.
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