发明授权
US5327001A Thin film transistor array having single light shield layer over
transistors and gate and drain lines
失效
薄膜晶体管阵列在晶体管和栅极和漏极线上具有单个屏蔽层
- 专利标题： Thin film transistor array having single light shield layer over transistors and gate and drain lines
- 专利标题（中）： 薄膜晶体管阵列在晶体管和栅极和漏极线上具有单个屏蔽层
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申请号： US41537申请日： 1993-04-01
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公开(公告)号： US5327001A公开(公告)日： 1994-07-05
- 发明人: Haruo Wakai , Nobuyuki Yamamura , Syunichi Sato , Minoru Kanbara
- 申请人： Haruo Wakai , Nobuyuki Yamamura , Syunichi Sato , Minoru Kanbara
- 申请人地址： JPX Tokyo
- 专利权人： Casio Computer Co., Ltd.
- 当前专利权人： Casio Computer Co., Ltd.
- 当前专利权人地址： JPX Tokyo
- 主分类号： G02F1/1362
- IPC分类号： G02F1/1362 ; H01L27/01 ; H01L27/13 ; H01L29/78
摘要：
A TFT array has a plurality of gate lines and a plurality of drain lines formed on a transparent insulating substrate. The gate lines intersect with the drain lines. TFTs are formed at the intersections of the gate lines and the drain lines. An opaque film is formed above the gate lines, the drain lines, and the TFTs, allowing no passage of light passing through the gaps between the transparent electrode, on the one hand, and the gate and drain lines, on the other hand. Therefore, when the TFT array is incorporated into a liquid-crystal display, the display will display high-contrast images.
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