发明授权
- 专利标题: Redundancy selection apparatus and method for an array
- 专利标题(中): 冗余选择装置及阵列方法
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申请号: US892919申请日: 1992-06-03
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公开(公告)号: US5327381A公开(公告)日: 1994-07-05
- 发明人: Larry D. Johnson , Mark G. Johnson
- 申请人: Larry D. Johnson , Mark G. Johnson
- 申请人地址: CA Sunnyvale
- 专利权人: Mips Computer Systems, Inc.
- 当前专利权人: Mips Computer Systems, Inc.
- 当前专利权人地址: CA Sunnyvale
- 主分类号: G11C8/10
- IPC分类号: G11C8/10 ; G11C29/00 ; G11C7/00
摘要:
A fused decoder for selecting one or more elements of an array, such as a row of memory, is provided. The corresponding row of memory can be permanently deselected by blowing the fuse of the decoder. Array components such as a redundant row of memory, can be substituted for the deselected component. The decoder includes a gate formed exclusively from NMOS transistors so that the decoder can provide a select signal in response to an address without an PMOS transistor responding to the address- By eliminating PMOS transistors from the gate portion of the decoder, the load presented to the address lines is reduced.
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