发明授权
US5341037A Sample hold circuit, buffer circuit and sample hold apparatus using
these circuits
失效
使用这些电路的采样保持电路,缓冲电路和采样保持装置
- 专利标题: Sample hold circuit, buffer circuit and sample hold apparatus using these circuits
- 专利标题(中): 使用这些电路的采样保持电路,缓冲电路和采样保持装置
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申请号: US886904申请日: 1992-05-22
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公开(公告)号: US5341037A公开(公告)日: 1994-08-23
- 发明人: Takahiro Miki , Toshio Kumamoto
- 申请人: Takahiro Miki , Toshio Kumamoto
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX3-210908 19910822
- 主分类号: G11C27/02
- IPC分类号: G11C27/02 ; H03K5/159
摘要:
Positive and negative output ends of a differential circuit in a sample hold circuit are connected to capacitors through switch circuits. Further, collectors of two input transistors of a buffer circuit connected to the sample hold circuit are driven by a collector driving differential circuit, so as to make the collector.multidot.base voltages of two input transistors same to each other. Consequently, a stable sample hold circuit having an arbitrary gain can be provided. In addition, drifts of outputs from two capacitors in the sample hold circuit can be made equal to each other by the buffer circuit.
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