Invention Grant
- Patent Title: Semiconductor structures having dual surface via holes
- Patent Title (中): 具有双面通孔的半导体结构
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Application No.: US54380Application Date: 1993-04-28
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Publication No.: US5343071APublication Date: 1994-08-30
- Inventor: Thomas E. Kazior , John C. Huang
- Applicant: Thomas E. Kazior , John C. Huang
- Applicant Address: MA Lexington
- Assignee: Raytheon Company
- Current Assignee: Raytheon Company
- Current Assignee Address: MA Lexington
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/48 ; H01L27/06 ; H01L29/417 ; H01L29/06
Abstract:
A semiconductor structure having an active layer formed over a first surface of a substrate. The semiconductor structure includes an electrode formed over a first surface of the structure. A conductive layer is formed over a second surface of the substrate. A conductor section passes through the semiconductor structure between the electrode and the conductive layer. The conductor section includes two conductive elements, one having a first end connected to the electrode and a second end terminating in the semiconductor structure; and the other conductive element having a first end connected to the conductive layer and a second end connected to the second end of the first conductive element. The second end terminates at, or in, an etch resistant layer disposed in the semiconductor structure between the active layer and the substrate. The method for forming the conductive sections includes etching the second via hole from the second surface of the substrate until the etching reaches an etch resistant layer. The walls of the second via hole and exposed portions of the conductive material covering the walls of the first via hole are covered with an electrically conductive material.
Public/Granted literature
- US6034423A Lead frame design for increased chip pinout Public/Granted day:2000-03-07
Information query
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