发明授权
- 专利标题: Security circuit for protecting data stored in memory
- 专利标题(中): 用于保护存储在存储器中的数据的安全电路
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申请号: US141547申请日: 1993-10-27
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公开(公告)号: US5357467A公开(公告)日: 1994-10-18
- 发明人: Shuji Hayashi
- 申请人: Shuji Hayashi
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX4-288562 19921027; JPX5-251502 19931007
- 主分类号: G06F1/00
- IPC分类号: G06F1/00 ; G06F12/14 ; G06F15/78 ; G06F21/24 ; G11C13/00
摘要:
A memory stores data, the contents of which must be kept secret. A memory stores security data and a latch circuit latches key data for releasing the security. A comparison circuit compares security data with key data, outputs a coincidence signal when they coincide with each other and outputs a non-coincidence signal when they do not coincide with each other. When a coincidence signal is output from the comparison circuit, an output signal of a change bit control circuit is set to the "0" level and address changing circuits change an address signal for reading out data from the memory according to the security data supplied from the memory.
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