发明授权
- 专利标题: Block erasable nonvolatile memory device
- 专利标题(中): 块可擦除非易失性存储器件
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申请号: US27489申请日: 1993-03-05
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公开(公告)号: US5371702A公开(公告)日: 1994-12-06
- 发明人: Hiroto Nakai , Hideo Kato , Kaoru Tokushige , Masamichi Asano , Kazuhisa Kanazawa , Toshio Yamamura
- 申请人: Hiroto Nakai , Hideo Kato , Kaoru Tokushige , Masamichi Asano , Kazuhisa Kanazawa , Toshio Yamamura
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX4-048338 19920305; JPX4-281193 19921020
- 主分类号: G11C16/16
- IPC分类号: G11C16/16 ; G11C11/34 ; G11C7/00
摘要:
In response to a plurality of address signal input from the outside in sequence, an erase information inputting section controls an erase information holding section corresponding to the batch erase block to be erased so as to hold an erase information data. By repeating this operation in sequence, the erase information data are stored in the erase information holding sections corresponding to the plural batch erase blocks to be erased. Successively, on the basis of the erase information data stored in the erase information holding sections, block erasing sections are activated to erase all the nonvolatile memory cells of each of the corresponding blocks where the erase information data are held. As a result, the erasure operation is achieved for all the batch erase blocks corresponding to the erase information holding sections in each of which the erase information data is held, so that a plurality of batch erase blocks can be erased simulataneously, thus reducing the erasure time, as compared with the prior art memory device.
公开/授权文献
- US6079542A Object sorter and sizer 公开/授权日:2000-06-27