发明授权
US5371707A Dynamic random access memory device equipped with dummy cells implemented by enhancement type transistors 失效
配备有由增强型晶体管实现的虚拟单元的动态随机存取存储器件

  • 专利标题: Dynamic random access memory device equipped with dummy cells implemented by enhancement type transistors
  • 专利标题(中): 配备有由增强型晶体管实现的虚拟单元的动态随机存取存储器件
  • 申请号: US10162
    申请日: 1993-01-28
  • 公开(公告)号: US5371707A
    公开(公告)日: 1994-12-06
  • 发明人: Sumio Ogawa
  • 申请人: Sumio Ogawa
  • 申请人地址: JPX Tokyo
  • 专利权人: NEC Corporation
  • 当前专利权人: NEC Corporation
  • 当前专利权人地址: JPX Tokyo
  • 优先权: JPX4-040326 19920130
  • 主分类号: G11C11/4099
  • IPC分类号: G11C11/4099 G11C7/00
Dynamic random access memory device equipped with dummy cells
implemented by enhancement type transistors
摘要:
A shared sense amplifier circuit incorporated in a dynamic random access memory device is coupled at input/output nodes with dummy cells implemented by n-channel enhancement type field effect transistors for pulling one of the input/output nodes down upon access to one of the memory cells, and one of the enhancement type dummy cells rapidly turns off so that undershoot takes place at the associated input/output node due to channel resistance between the shared sense amplifier circuit and a bit line pair, thereby enlarging differential voltage applied between the input/output nodes of the shared sense amplifier circuit.
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