Invention Grant
- Patent Title: Logic circuit with controlled current supply output
- Patent Title (中): 具有受控电流输出的逻辑电路
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Application No.: US52200Application Date: 1993-04-22
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Publication No.: US5428302APublication Date: 1995-06-27
- Inventor: Yasunobu Nakase
- Applicant: Yasunobu Nakase
- Applicant Address: JPX Tokyo
- Assignee: Mitsubishi Denki Kabushiki Kaisha
- Current Assignee: Mitsubishi Denki Kabushiki Kaisha
- Current Assignee Address: JPX Tokyo
- Priority: JPX4-104254 19920423
- Main IPC: H01L21/8249
- IPC: H01L21/8249 ; H01L27/06 ; H03K19/08 ; H03K19/0944 ; H03K19/20 ; H03K19/01
Abstract:
A semiconductor logic circuit apparatus includes a plurality of logic circuits each including complementary field effect transistors, and a plurality bipolar transistors associated with the respective ones of the logic circuits. When any one of the outputs of the logic circuits becomes high, an associated bipolar transistor becomes conductive to cause an output terminal of the apparatus to be charged from a voltage supply. With all the outputs of the logic circuits being low, all of the bipolar transistors are non-conductive, and a current supply coupled between the output terminal and ground dicharges charge on the output terminal.
Public/Granted literature
- USD378410S Stud gun end Public/Granted day:1997-03-11
Information query
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