发明授权
US5444855A System for guaranteed CPU bus access by I/O devices monitoring
separately predetermined distinct maximum non CPU bus activity and
inhibiting I/O devices thereof
失效
用于I / O设备保证CPU总线访问的系统分别监视预定的不同的最大非CPU总线活动并禁止其I / O设备
- 专利标题： System for guaranteed CPU bus access by I/O devices monitoring separately predetermined distinct maximum non CPU bus activity and inhibiting I/O devices thereof
- 专利标题（中）： 用于I / O设备保证CPU总线访问的系统分别监视预定的不同的最大非CPU总线活动并禁止其I / O设备
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申请号： US870581申请日： 1992-04-17
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公开(公告)号： US5444855A公开(公告)日： 1995-08-22
- 发明人: Stephen P. Thompson
- 申请人： Stephen P. Thompson
- 申请人地址： NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： NY Armonk
- 主分类号： G06F13/362
- IPC分类号： G06F13/362 ; G06F13/372 ; G06F13/36
摘要：
A method and system for controlling access to a system bus in a computer system is provided. The system devices include a central processing unit, a memory controller for controlling access to system memory, and at least one input/output device having a coprocessor incorporated therein. The system bus electrically connects the system devices. Any one of the system devices may serve as a bus master of the system bus at any one time when communicating over the bus with each other or with system memory. Each of the at least one input/output device incorporates control logic therein for (i) monitoring bus activity to calculate the bus mastering time during which the memory controller and the at least one input/output device control the bus, and (ii) outputting an inhibit signal which denies access to the bus by the at least one input/output device if the calculated bus mastering time is equal to or greater than a predetermined bus mastering time period.