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US5448523A BICMOS cache TAG having small signal exclusive OR for TAG comparison 失效
BICMOS缓存TAG具有小信号异或用于TAG比较

BICMOS cache TAG having small signal exclusive OR for TAG comparison
摘要:
A cache TAG RAM (25) includes a TAG array (26), a small signal exclusive OR logic circuit (33, 34), a sense amplifier (36, 37), and another exclusive OR logic circuit (30, 31). A comparison of a stored TAG address to the input address signal is made by the small signal exclusive OR logic circuit (33, 34) to provide a hit signal very quickly. The stored TAG address that is lost during the exclusive OR operation is recovered by performing another exclusive OR on the match information and the input address signal. By using a small signal exclusive OR circuit to perform a comparison early, the hit signal can be generated very quickly.
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